Motorola MPC8240 User Manual page 396

2
I C Interface Overview
• Bus-busy detection
• Programmable on-chip digital filter rejecting electrical spikes on the bus
• Module reset through software
2
10.1.2 I C Interface Signal Summary
2
The I C interface uses the serial data (SDA) signal and serial clock (SCL) signal for data
transfer. All devices connected to these two signals must have open-drain or open-collector
outputs. A logical AND function is performed on both signals with external pull-up
resistors. Note that the signal patterns driven on SDA represent address, data, or read/write
information at different stages of the protocol.
Table 10-1 summarizes the two signals that comprise the I
Signal Name Idle State
SCL (serial clock) HIGH
SDA (serial data) HIGH
2
10.1.3 I C Register Summary
There are five registers in the I
control, and status of the I
memory block; see Section 3.4, "Embedded Utilities Memory Block (EUMB)." Table 10-2
2
summarizes the I C registers. Complete descriptions of these registers are provided in
Section 10.3, "I2C Register Descriptions."
10-2
2
Table 10-1. I C Interface Signal Description
I/O
I When the MPC8240 is idle or acts as a slave, SCL defaults as an input.
The unit uses SCL to synchronize incoming data on SDA. The bus is
assumed to be busy when SCL is detected low.
O As a master, the MPC8240 drives SCL along with SDA when transmitting.
As a slave, the MPC8240 drives SCL low for data pacing.
I When the MPC8240 is idle or in a receiving mode, SDA defaults as an
input. The unit receives data from other
assumed to be busy when SDA is detected low.
O When writing as a master or slave, the MPC8240 drives data on SDA
synchronous to SCL.
2
C unit that are used for the address, data, configuration,
2
C interface. These registers are located in the embedded utilities
2
Table 10-2. I C Register Summary
Local Memory
Offset
2
0x0_3000 I C address register (I2CADR)
2
0x0_3004 I C frequency divider register (I2CFDR)
2
0x0_3008 I C control register (I2CCR)
2
0x0_300C I C status register (I2CSR)
2
0x0_3010 I C data register (I2CDR)
MPC8240 Integrated Processor User's Manual
2
C interface.
State Meaning
2
I C
Register Name
devices on SDA. The bus is