Sdram Controller Power Saving Configurations - Motorola MPC8240 User Manual

SDRAM Interface Operation
Table 6-15 summarizes the refresh types available in each power-saving modes and the
relevant configuration parameters.
Table 6-14. SDRAM Controller Power Saving Configurations
Power Saving
Mode
Sleep
Nap
Doze
Table 6-15. SDRAM Power Saving Modes Refresh Configuration
Power Saving
Mode
Doze
Nap
Sleep
6-34
Power Save
Configuration Bits
And Signal Values
PMCR1[PM] = 1 Self
PMCR1[SLEEP] = 1
Normal
None
PMCR1[PM] = 1 Normal
PMCR1[SLEEP] = 0
PMCR1[NAP] = 1
PMCR1[PM] = 1 Normal
PMCR1[SLEEP] = 0,
PMCR1[NAP] = 0,
PMCR1[DOZE] = 1
Power Management Control Register (PMCR1)
Refresh
Type
PM DOZE
Normal 1 1
Normal 1 —
Self 1 —
Normal 1 —
MPC8240 Integrated Processor User's Manual
Refresh
Refresh Configuration Bit Settings
Type
PMCR1[LP_REF_EN] = 1,
MEMCFG[SREN] = 1
PMCR1[LP_REF_EN] = 1,
MEMCFG[SREN] = 0
PMCR1[LP_REF_EN] = 0
No additional bits required
No additional bits required
NAP SLEEP
0 0
1 0
— 1
— 1
MCCR1
[SREN]
LP_REF_EN
— —
— —
1 1
1 0