Pci Bus Request (Req[4:0])—Input - Motorola MPC8240 User Manual

Detailed Signal Descriptions
2.2.1.1 PCI Bus Request (REQ[4:0])—Input
The PCI bus request signals (REQ[4:0]) are inputs on the MPC8240, and they have a
different meaning depending on whether the MPC8240 PCI arbiter is enabled or disabled.
The PCI REQn signals are point-to-point, and every master has its own REQn signal.
2.2.1.1.1 PCI Bus Request (REQ[4:0])—Internal Arbiter Enabled
The MPC8240 PCI arbiter is enabled by a low value on the reset configuration pin MAA2
or by the setting of bit 15 of the PCI arbitration control register. In this case, the REQ[4:0]
signals are used in conjunction with the GNT[4:0] signals as the arbiter for up to five PCI
masters. Following is the state meaning for the REQ[4:0] input signals in this case.
State Meaning
2.2.1.1.2 PCI Bus Request (REQ[4:0])—Internal Arbiter Disabled
The MPC8240 PCI arbiter is disabled by a high value on the reset configuration pin MAA2
or by the clearing of bit 15 of the PCI arbitration control register. In this case, the REQ0
becomes the PCI bus grant input for the MPC8240, and it is asserted when the external
arbiter is granting the use of the PCI bus to the MPC8240. Note that if the REQ0 input
signal is asserted prior to the need to run a PCI transaction, then the MPC8240 GNT0 signal
will not assert (the bus is parked) when a PCI transaction is to be run.
The REQ[4:1] input signals are ignored when the internal arbiter is disabled. Following is
the state meaning of the REQ0 signal when the internal arbiter is disabled.
State Meaning
2.2.1.2 PCI Bus Grant (GNT[4:0])—Output
The PCI bus grant (GNT[4:0]) signals are outputs on the MPC8240 and they have a
different meaning depending on whether the MPC8240 PCI arbiter is enabled or disabled.
The PCI GNTn signals are point-to-point; every master has its own GNTn signal.
2.2.1.2.1 PCI Bus Grant (GNT[4:0])—Internal Arbiter Enabled
The MPC8240 PCI arbiter is enabled by a low value on the reset configuration pin MAA2
or by the setting of bit 15 of the PCI arbitration control register. In this case, the GNT[4:0]
2-8
Asserted—External devices are requesting control of the PCI bus.
The MPC8240 acts on the requests as described in Section 7.2, "PCI
Bus Arbitration."
Negated—Indicates that no external devices are requesting the use of
the PCI bus.
Asserted—The REQ0 signal indicates that the MPC8240 is granted
control of the PCI bus. If REQ0 is asserted before the MPC8240 has
a transaction to perform (that is, the MPC8240 is parked), the
MPC8240 drives AD[31:0], C/BE[3:0], and PAR to stable (but
meaningless) states until they are needed for a legitimate transaction.
Negated—REQ0 is negated when the MPC8240 is not granted
control of the PCI bus.
MPC8240 Integrated Processor User's Manual