System Error (Serr)—Output - Motorola MPC8240 User Manual

Integrated host processor with integrated pci
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2.2.1.12.1 System Error (SERR)—Output
Following is the state meaning for SERR as an output signal.
State Meaning
2.2.1.12.2 System Error (SERR)—Input
Following is the state meaning for SERR as an input signal.
State Meaning
2.2.1.13 Stop (STOP)
The stop (STOP) signal is both an input and output signal on the MPC8240. Refer to
Section 7.4.3.2, "Target-Initiated Termination," for more information on the use of the
STOP signal.
2.2.1.13.1 Stop (STOP)—Output
Following is the state meaning for STOP as an output signal.
State Meaning
2.2.1.13.2 Stop (STOP)—Input
Following is the state meaning for STOP as an input signal.
State Meaning
2.2.1.14 Interrupt Request (INTA)—Output
Following is the state meaning for INTA. This signal is primarily used when the MPC8240
is programmed in agent mode.
State Meaning
Asserted—Indicates that an address parity error, a target-abort (when
the MPC8240 is acting as the initiator), or some other system error
(where the result is a catastrophic error) was detected.
Negated—Indicates no error.
Asserted—Indicates that a target (other than the MPC8240) has
detected a catastrophic error.
Negated—Indicates no error.
Asserted—Indicates that the MPC8240, acting as a PCI target, is
requesting that the initiator stop the current transaction.
Negated—Indicates that the current transaction can continue.
Asserted—Indicates that when the MPC8240 is acting as a PCI
initiator, it is receiving a request from the target to stop the current
transaction.
Negated—Indicates that the current transaction can continue.
Asserted—Indicates that the MPC8240 is requesting an interrupt on
the PCI bus. These interrupts are caused by the on-chip DMA
controller and the message unit.
Negated—Indicates that the MPC8240 is not requesting an interrupt
on the PCI bus.
Chapter 2. Signal Descriptions and Clocking
Detailed Signal Descriptions
2-15

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