Motorola MPC8240 User Manual page 411

I2CCR[MTX]
== 1
Master Xmit
Y
Last byte
== 1
Generate
N End of address phase for
STOP
master receive mode?
Write next byte
to I2CDR
Y
Set
I2CCR[TXAK]
EOI
N
Master Rcv
Last byte
N
Y
Next-to-last
byte
Set
I2CCR[TXAK]
Read I2CDR
and store
Figure 10-8. Example I
Clear I2CSR[MIF]
== 1
I2CCR[MSTA]
== 0
A
N
I2CSR[RXAK]
== 0
Y
Slave Data Cycle
Only one byte
to receive?
Slave Xmit
N
Clear I2CCR[MTX]
Clear I2CCR[MTX]
Read I2CDR
(dummy read)
A
Y
Generate
STOP
EOI
2
C Interrupt Service Routine Flowchart
Chapter 10. I
== 0
== 1
I2CCR[MAL]
Clear I2CCR[MAL]
== 1
I2CSR[MAAS]
== 0
EOI
== 1
== 1
I2CSR[RXAK]
== 0
Read I2CDR Write next byte
(dummy read)
to I2CDR
EOI
Slave Addr. Phase
== 1
I2CSR[SRW]
Set I2CCR[MTX]
Write I2CDR
2
C Interface
Programming Guidelines
== 0
== 1
I2CSR[MAAS]
== 0
B
== 0
I2CCR[MTX]
Slave Received
Read I2CDR
and store
N
All done
Y
Set I2CCR[TXAK]
B
== 0
Clear I2CCR[MTX]
Dummy read
EOI
B
10-17