Pci Address Attribute Signal Timing - Motorola MPC8240 User Manual

Integrated host processor with integrated pci
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Address Attribute Signals
Table 15-4. PCI Attribute Signal Encodings (Continued)
1
1

15.2.4 PCI Address Attribute Signal Timing

The PCI attribute signals have timing characteristics as shown in Figure 15-1 and
Figure 15-2. Note that the attribute signals are valid at the same time as the address for all
MPC8240-sourced PCI accesses. During all other clock cycles, PMAA[0:2] are held at the
value 0b111.
PCI_CLK[0:4]
AD[31:0]
C/BE[3:0]
FRAME
IRDY
DEVSEL
TRDY
PMAA[0:2]
b'111'
Figure 15-1. Example PCI Address Attribute Signal Timing for Burst Read
15-4
1
0
write
1
1
write
ADDR
T/A
DATA1
CMD
Byte Enables 1
Operations
MPC8240 Integrated Processor User's Manual
DMA channel 1 PCI write
PCI address bus invalid
DATA2
Byte Enables 2
VALID
T/A
T/A

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