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SDRAM Interface Operation
Table 6-7. SDRAM Address Multiplexing SDBA[1:0]
msb
Row x Col x Bank
0-2
11x10x2
SDRAS
SDCAS
11x9x2
SDRAS
SDCAS
11x8x2
SDRAS
SDCAS
13x10x2
SDRAS
SDCAS
13x9x2
SDRAS
SDCAS
13x8x2
SDRAS
SDCAS
12x10x4
SDRAS
SDCAS
12x9x4
SDRAS
SDCAS
6-12
and SDMA[12:0]—64-Bit Mode
1
3 4 5 6 7 8
9
0
B
1
A
0
0
9 8
B
A
0
B
1
A
0
0
8
B
A
0
B
1
A
0
0
B
A
0
1
1
B
1
1
2
A
0
0
9 8
B
A
0
1
1
B
1
1
2
A
0
0
8
B
A
0
1
1
B
1
1
2
A
0
0
B
A
0
1
B
B
1
1
A
A
0
1
0
9 8
B
B
A
A
1
0
1
B
B
1
1
A
A
0
1
0
8
B
B
A
A
1
0
MPC8240 Integrated Processor User's Manual
Physical Address
1
1
1
1
1
1
1
1
1
1
2
3
4
5
6
7
8
9
9 8 7 6 5 4 3 2 1 0
9 8 7 6 5 4 3 2 1 0
9 8 7 6 5 4 3 2 1 0
9 8 7 6 5 4 3 2 1 0
9 8 7 6 5 4 3 2 1 0
9 8 7 6 5 4 3 2 1 0
9 8 7 6 5 4 3 2 1 0
9 8 7 6 5 4 3 2 1 0
2
2
2
2
2
2
2
2
2
0
1
2
3
4
5
6
7
8
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
lsb
2
3
3
9
0
1
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