Motorola MPC8240 User Manual page 8

Integrated host processor with integrated pci
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2.2.4.2
Serial Clock (SCL) ................................................................................... 2-25
2.2.4.2.1
2.2.4.2.2
2.2.5
System Control and Power Management Signals......................................... 2-25
2.2.5.1
Hard Reset ................................................................................................ 2-26
2.2.5.1.1
2.2.5.1.2
2.2.5.2
Soft Reset (SRESET)-Input ................................................................... 2-26
2.2.5.3
Machine Check (MCP)-Output .............................................................. 2-27
2.2.5.4
Nonmaskable Interrupt (NMI)-Input ..................................................... 2-27
2.2.5.5
System Management Interrupt (SMI)-Input .......................................... 2-28
2.2.5.6
Checkstop In (CHKSTOP_IN)-Input..................................................... 2-28
2.2.5.7
Time Base Enable (TBEN)-Input .......................................................... 2-28
2.2.5.8
Quiesce Acknowledge (QACK)-Output ................................................ 2-28
2.2.5.9
Watchpoint Trigger Signals ...................................................................... 2-29
2.2.5.9.1
2.2.5.9.2
2.2.5.10
Debug Signals........................................................................................... 2-29
2.2.5.10.1
2.2.5.10.2
2.2.5.10.3
2.2.5.10.4
2.2.6
Test and Configuration Signals..................................................................... 2-31
2.2.6.1
PLL Configuration (PLL_CFG[0:4])-Input ........................................... 2-31
2.2.6.2
JTAG Test Clock (TCK)-Input .............................................................. 2-31
2.2.6.3
JTAG Test Data Input (TDI)-Input ........................................................ 2-32
2.2.6.4
JTAG Test Data Output (TDO)-Output ................................................. 2-32
2.2.6.5
JTAG Test Mode Select (TMS)-Input ................................................... 2-32
2.2.6.6
JTAG Test Reset (TRST)-Input ............................................................. 2-32
2.2.7
Clock Signals ................................................................................................ 2-32
2.2.7.1
System Clock Input (OSC_IN)-Input .................................................... 2-33
2.2.7.2
PCI Clock (PCI_CLK[0:4])-Output....................................................... 2-33
2.2.7.3
2.2.7.4
PCI Feedback Clock (PCI_SYNC_IN)-Input ........................................ 2-33
2.2.7.5
SDRAM Clock Outputs (SDRAM_CLK[0:3])-Output ......................... 2-33
2.2.7.6
2.2.7.7
SDRAM Feedback Clock (SDRAM_SYNC_IN)-Input ........................ 2-33
2.2.7.8
Debug Clock (CKO)-Output .................................................................. 2-34
2.3
Clocking ........................................................................................................... 2-34
2.3.1
Clocking Method .......................................................................................... 2-34
2.3.2
DLL Operation and Locking......................................................................... 2-35
2.3.3
Clock Synchronization.................................................................................. 2-36
2.3.4
Clocking System Solution Examples............................................................ 2-37
2.4
Configuration Signals Sampled at Reset........................................................... 2-38
viii
CONTENTS
Serial Clock (SCL)-Output ................................................................ 2-25
Serial Clock (SCL)-Input ................................................................... 2-25
Hard Reset (Processor) (HRST_CPU)-Input ..................................... 2-26
Watchpoint Trigger In (TRIG_IN)-Input........................................... 2-29
Watchpoint Trigger Out (TRIG_OUT)-Output ................................. 2-29
Memory Address Attributes (MAA[0:2])-Output.............................. 2-30
PCI Address Attributes (PMAA[0:2])-Output................................... 2-30
Debug Address (DA[0:15])-Output ................................................... 2-30
Memory Interface Valid (MIV)-Output............................................. 2-31
MPC8240 Integrated Processor User's Manual
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