Motorola MPC8240 User Manual page 17

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Embedded Programmable Interrupt Controller (EPIC) Unit
11.1 EPIC Unit Overview ......................................................................................... 11-1
11.1.1 EPIC Features Summary............................................................................... 11-2
11.1.2 EPIC Interface Signal Description................................................................ 11-2
11.1.3 EPIC Block Diagram .................................................................................... 11-3
11.2 EPIC Register Summary ................................................................................... 11-4
11.3 EPIC Unit Interrupt Protocol ............................................................................ 11-7
11.3.1 Interrupt Source Priority ............................................................................... 11-7
11.3.2 Processor Current Task Priority.................................................................... 11-7
11.3.3 Interrupt Acknowledge ................................................................................. 11-8
11.3.4 Nesting of Interrupts ..................................................................................... 11-8
11.3.5 Spurious Vector Generation.......................................................................... 11-8
11.3.6 Internal Block Diagram Description............................................................. 11-9
11.3.6.1 Interrupt Pending Register (IPR)-Non-programmable .......................... 11-9
11.3.6.2 Interrupt Selector (IS) ............................................................................... 11-9
11.3.6.3 Interrupt Request Register (IRR)............................................................ 11-10
11.3.6.4 In-Service Register (ISR) ....................................................................... 11-10
11.4 EPIC Pass-Through Mode .............................................................................. 11-10
11.5 EPIC Direct Interrupt Mode............................................................................ 11-11
11.6 EPIC Serial Interrupt Interface ....................................................................... 11-11
11.6.1 Sampling of Serial Interrupts...................................................................... 11-11
11.6.2 Serial Interrupt Timing Protocol................................................................. 11-12
11.6.3 Edge/Level Sensitivity of Serial Interrupts................................................. 11-12
11.7 EPIC Timers.................................................................................................... 11-13
11.8 Programming Guidelines ................................................................................ 11-13
11.9 Register Definitions ........................................................................................ 11-16
11.9.1 Feature Reporting Register (FRR).............................................................. 11-16
11.9.2 Global Configuration Register (GCR)........................................................ 11-16
11.9.3 EPIC Interrupt Configuration Register (EICR) .......................................... 11-17
11.9.4 EPIC Vendor Identification Register (EVI)................................................ 11-18
11.9.5 Processor Initialization Register (PI).......................................................... 11-19
11.9.6 Spurious Vector Register (SVR)................................................................. 11-19
11.9.7 Global Timer Registers............................................................................... 11-20
11.9.7.1 Timer Frequency Reporting Register (TFRR)........................................ 11-20
11.9.7.2 Global Timer Current Count Registers (GTCCRs) ................................ 11-21
11.9.7.3 Global Timer Base Count Registers (GTBCRs)..................................... 11-21
11.9.7.4 Global Timer Vector/Priority Registers (GTVPRs) ............................... 11-22
11.9.7.5 Global Timer Destination Registers (GTDRs) ....................................... 11-23
11.9.8 External (Direct and Serial), and Internal Interrupt Registers .................... 11-24
11.9.8.1 Direct & Serial Interrupt Vector/Priority Registers (IVPRs, SVPRs) .... 11-24
11.9.8.2 Direct & Serial Interrupt Destination Registers (IDRs, SDRs) .............. 11-25
CONTENTS
Title
Chapter 11
Contents
Page
Number
xvii