Address Translation Registers - Motorola MPC8240 User Manual

Address Translation
The outbound memory base address register (OMBAR) and the outbound translation
window register (OTWR) specify the location and size of the outbound memory window
and the outbound translation window. These registers are described in Section 3.3.3,
"Address Translation Registers." Outbound address translation may be disabled by
programming the outbound window size to all zeros.
Note that overlapping the inbound memory window and the outbound translation window
is not supported and can cause unpredictable behavior. Also, the outbound memory window
and the outbound translation window must not overlap with the EUMB as specified by the
EUMBBAR (from the processor's view) or the PCSRBAR (from the PCI memory space
view). Operation is not guaranteed if the two are overlapping.

3.3.3 Address Translation Registers

This section describes the address translation registers in detail. The address translation
registers, summarized in Table 3-7, specify the windows for inbound and outbound address
translation.
Register Name
Local memory base MPC8240 internal configuration
address register registers—see Chapter 4, "Configuration
(LMBAR) Registers"
Offset 0x10
Inbound translation EUMB—see Section 3.4, "Embedded
window register Utilities Memory Block (EUMB)"
(ITWR) Offset 0x0_2310 (local)
Offset 0x310 (PCI)
Outbound memory EUMB—see Section 3.4, "Embedded
base address Utilities Memory Block (EUMB)"
register Offset 0x0_2300 (local)
(OMBAR) Offset 0x300 (PCI)
Outbound EUMB—see Section 3.4, "Embedded
translation window Utilities Memory Block (EUMB)"
register Offset 0x0_2308 (local)
(OTWR) Offset 0x308 (PCI)
3-14
Table 3-7. ATU Register Summary
Location
MPC8240 Integrated Processor User's Manual
Description
Specifies the starting address of the inbound
memory window. PCI memory transactions in
the inbound memory window are translated to
the inbound translation window (specified in the
ITWR) in local memory.
Specifies the starting address of the inbound
translation window and the size of the window.
Specifies the starting address for the outbound
memory window. Processor transactions in the
outbound memory window are translated to the
outbound translation window (specified in the
OTWR) in PCI memory space.
Specifies the starting address of the outbound
translation window and the size of the window.