Queue Base Address Register (Qbar) - Motorola MPC8240 User Manual

Integrated host processor with integrated pci
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9.3.4.2.12 Queue Base Address Register (QBAR)

The QBAR specifies the beginning address of the circular queue structure in local memory.
Figure 9-20 shows the bits of the QBAR.
QBA
31
Figure 9-20. Queue Base Address Register (QBAR)
Table 9-24 shows the bit settings for the QBAR.
Table 9-24. QBAR Field Descriptions— Offset 0x0_0170
Reset
Bits
Name
Value
31–20
QBA
All 0s
19–0
All 0s
20 19
R/W
RW
Queue base address. Base address of circular queue in local memory. Note that
the circular queue must be aligned on a 1-Mbyte boundary.
R
Reserved
Chapter 9. Message Unit (with I
0 0 0 0_0 0 0 0_0 0 0 0_0 0 0 0_0 0 0 0
Description
O)
2
I
O Interface
2
Reserved
0
9-21

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