Motorola MPC8240 User Manual page 46

Integrated host processor with integrated pci
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Acronyms and Abbreviations
Table i. Acronyms and Abbreviated Terms (Continued)
Term
MSB
Most-significant byte
msb
Most-significant bit
MSR
Machine state register
Mux
Multiplex
NaN
Not a number
No-op
No operation
OEA
Operating environment architecture
PCI
Peripheral component interconnect
PCIB/MC
PCI bridge/memory controller
PICR
Processor interface configuration register
PID
Processor identification tag
PIR
Processor identification register
PLL
Phase-locked loop
PMC
Power management controller
PMCR
Power management configuration register
PTE
Page table entry
PTEG
Page table entry group
PVR
Processor version register
RAS
Row address strobe
RAW
Read-after-write
RISC
Reduced instruction set computing
ROM
Read-only memory
RPA
Required physical address
RTL
Register transfer language
RWITM
Read with intent to modify
SDR1
Register that specifies the page table base address for virtual-to-physical address translation
SDRAM
Synchronous dynamic random access memory
SIMM
Single in-line memory module
SPR
Special-purpose register
SR
Segment register
SRR0
Machine status save/restore register 0
SRR1
Machine status save/restore register 1
SRU
System register unit
TAP
Test access port
TB
Time base facility
TBL
Time base lower register
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MPC8240 Integrated Processor User's Manual
Meaning

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