Motorola MPC8240 User Manual page 7

Paragraph
Number
2.2.1.12 System Error (SERR) ............................................................................... 2-14
2.2.1.12.1
2.2.1.12.2
2.2.1.13 Stop (STOP).............................................................................................. 2-15
2.2.1.13.1
2.2.1.13.2
2.2.1.14 Interrupt Request (INTA)-Output........................................................... 2-15
2.2.1.15 ID Select (IDSEL)-Input ........................................................................ 2-16
2.2.2 Memory Interface Signals............................................................................. 2-16
2.2.2.1 Row Address Strobe (RAS[0:7])-Output ............................................... 2-16
2.2.2.2 Column Address Strobe (CAS[0:7])-Output.......................................... 2-17
2.2.2.3 SDRAM Command Select (CS[0:7])-Output ........................................ 2-17
2.2.2.4 SDRAM Data Input/Output Mask (DQM[0:7])-Output ........................ 2-17
2.2.2.5 Write Enable (WE)-Output .................................................................... 2-18
2.2.2.6 SDRAM Address (SDMA[11:0])-Output .............................................. 2-18
2.2.2.7 SDRAM Address 12 (SDMA12)-Output............................................... 2-18
2.2.2.8 SDRAM Internal Bank Select 0-1 (SDBA0, SDBA1)-Output ............. 2-18
2.2.2.9 Memory Data Bus (MDH[0:31], MDL[0:31]) ......................................... 2-19
2.2.2.9.1
2.2.2.9.2
2.2.2.10 Data Parity/ECC (PAR[0:7]) .................................................................... 2-20
2.2.2.10.1
2.2.2.10.2
2.2.2.11 ROM Address 19:12 (AR[19:12])-Output ............................................. 2-21
2.2.2.12 SDRAM Clock Enable (CKE)-Output................................................... 2-21
2.2.2.13 SDRAM Row Address Strobe (SDRAS)-Output .................................. 2-21
2.2.2.14 SDRAM Column Address Strobe (SDCAS)-Output ............................. 2-22
2.2.2.15 ROM Bank 0 Select (RCS0)-Output...................................................... 2-22
2.2.2.16 ROM Bank 1 Select (RCS1)-Output...................................................... 2-22
2.2.2.17 Flash Output Enable (FOE)-Output ....................................................... 2-23
2.2.2.18 Address Strobe (AS)-Output .................................................................. 2-23
2.2.3 EPIC Control Signals.................................................................................... 2-23
2.2.3.1 Discrete Interrupt 0:4 (IRQ[0:4])-Input ................................................. 2-23
2.2.3.2 Serial Interrupt Mode Signals ................................................................... 2-24
2.2.3.2.1
2.2.3.2.2
2.2.3.2.3
2.2.3.2.4
2.2.3.3 Local Interrupt (L_INT)-Output ............................................................ 2-24
2
2.2.4 I C Interface Control Signals........................................................................ 2-25
2.2.4.1 Serial Data (SDA)..................................................................................... 2-25
2.2.4.1.1
2.2.4.1.2
CONTENTS
System Error (SERR)-Output ............................................................ 2-15
System Error (SERR)-Input ............................................................... 2-15
Stop (STOP)-Output .......................................................................... 2-15
Stop (STOP)-Input ............................................................................. 2-15
Memory Data Bus (MDH[0:31], MDL[0:31])-Output ...................... 2-20
Memory Data Bus (MDH[0:31], MDL[0:31])-Input......................... 2-20
Data Parity (PAR[0:7])-Output.......................................................... 2-20
Data Parity (PAR[0:7])-Input............................................................. 2-21
Serial Interrupt Stream (S_INT)-Input............................................... 2-24
Serial Interrupt Clock (S_CLK)-Output ............................................ 2-24
Serial Interrupt Reset (S_RST)-Output.............................................. 2-24
Serial Interrupt Frame (S_FRAME)-Output ...................................... 2-24
Serial Data (SDA)-Output.................................................................. 2-25
Serial Data (SDA)-Input .................................................................... 2-25
Contents
Title
Page
Number
vii