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See
Table B-9
in
APPENDIX B
addressing modes description, MEMA format instructions require one word of memory and
MEMB usually require two words and therefore consume twice the bus bandwidth to read.
Otherwise, both formats perform the same functions.
2.3.1
Absolute
Absolute addressing modes allow a memory location to be referenced directly as an offset from
address 0H. At the instruction encoding level, two absolute addressing modes are provided:
absolute offset and absolute displacement, depending on offset size.
•
For the absolute offset addressing mode, the offset is an ordinal number ranging from 0 to 4095.
The absolute offset addressing mode is encoded in the MEMA machine instruction format.
•
For the absolute displacement addressing mode, the offset value ranges from 0 to 2
absolute displacement addressing mode is encoded in the MEMB format.
Addressing modes and encoding instruction formats are described in
INSTRUCTION SET
REFERENCE.
At the assembly language level, the two absolute addressing modes use the same syntax. Typically,
development tools allow absolute addresses to be specified through arithmetic expressions
(e.g., x + 44) or symbolic labels. After evaluating an address specified with the absolute addressing
mode, the assembler converts the address into an offset or displacement and selects the appropriate
instruction encoding format and addressing mode.
2.3.2
Register Indirect
Register indirect addressing modes use a register's 32-bit value as a base for address calculation.
The register value is referred to as the address base (designated "abase" in
on the addressing mode, an optional scaled index and offset can be added to this address base.
Register indirect addressing modes are useful for addressing elements of an array or record
structure. When addressing array elements, the abase value provides the address of the first array
element. An offset (or displacement) selects a particular array element.
In register-indirect-with-index addressing mode, the index is specified using a value contained in a
register. This index value is multiplied by a scale factor. Allowable factors are 1, 2, 4, 8 and 16. The
register-indirect-with-index addressing mode is encoded in the MEMB format.
The two versions of register-indirect-with-offset addressing mode at the instruction encoding level
are register-indirect-with-offset and register-indirect-with-displacement. As with absolute
addressing modes, the mode selected depends on the size of the offset from the base address.
DATA TYPES AND MEMORY ADDRESSING MODES
for more on addressing modes. For purposes of this memory
2
32
-1. The
CHAPTER 6,
Table
2-3). Depending
2-7
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