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TIMERS
10.1.1.1
Bit 0 - Terminal Count Status Bit (TMRx.tc)
The TMRx.tc bit is set when the Timer Count Register (TCRx) decrements to 0 and bit 2
(TMRx.reload) is not set for a timer. The TMRx.tc bit allows applications to monitor timer status
through software instead of interrupts. TMRx.tc remains set until software accesses (reads or
writes) the TMRx. The access clears TMRx.tc. The timer ignores any value specified for TMRx.tc
in a write request.
When auto-reload is selected for a timer and the timer is enabled, the TMRx.tc bit status is
unpredictable. Software should not rely on the value of the TMRx.tc bit when auto-reload is
enabled.
The processor also clears the TMRx.tc bit upon hardware or software reset. Refer to
"INITIALIZATION" (pg.
12-2).
10.1.1.2
Bit 1 - Timer Enable (TMRx.enable)
The TMRx.enable bit allows user software to control the timer's RUN/STOP status. When:
TMRx.enable = 1
The Timer Count Register (TCRx) value decrements every Timer Clock
(TCLOCK) cycle. TCLOCK is determined by the Timer Input Clock Select
(TMRx.csel bits 0-1). See
timer automatically clears TMRx.enable when the count reaches zero.
When TMRx.reload=1, the bit remains set. See
TMRx.enable = 0
The timer is disabled and ignores all input transitions.
User software sets this bit. Once started, the timer continues to run, regardless of other processor
activity.For example, the timer runs while the processor is in Halt mode. Three events can stop the timer:
•
User software explicitly clearing this bit (i.e., TMRx.enable = 0).
•
TCRx value decrements to 0, and the Timer Auto Reload Enable (TMRx.reload) bit = 0.
•
Hardware or software reset. Refer to
10-4
section
10.1.1.5. When TMRx.reload=0, the
section 12.2, "INITIALIZATION" (pg.
section 12.2,
section
10.1.1.3.
12-2).
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