Figure 7-1. Procedure Stack Structure And Local Registers - Intel i960 Jx Developer's Manual

Microprocessor
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The procedure stack can be located anywhere in the address space and grows from low addresses to
high addresses. It consists of contiguous frames, one frame for each active procedure. Local
registers for a procedure are assigned a save area in each stack frame
stack, available to the user, begins after this save area.
To increase procedure call speed, the architecture allows an implementation to cache the saved
local register sets on-chip. Thus, when a procedure call is made, the contents of the current set of
local registers often do not have to be written out to the save area in the stack frame in memory.
Refer to
section 7.1.4, "Caching Local Register Sets" (pg. 7-7)
Local Register Sets for High Priority Interrupts" (pg. 7-8)
procedure stack interrelations.
Current Register Set
.
.
.
Frame Pointer (FP)
Previous Frame Pointer (PFP)
Stack Pointer (SP)
reserved for RIP
.
.
.

Figure 7-1. Procedure Stack Structure and Local Registers

Procedure Stack
Previous Frame Pointer (PFP)
g0
Stack Pointer (SP)
Return Instruction Pointer (RIP)
g15
user allocated stack
padding area
r0
r1
register
r2
save area
r15
user allocated stack
unused stack
stack growth
(toward higher addresses)
PROCEDURE CALLS
(Figure
7-1). The procedure
and
section 7.1.4.1, "Reserving
for more about local registers and
.
.
.
r0
r1
Previous
Stack
r2
Frame
.
.
r15
.
Current
Stack
Frame
7
7-3

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