Add<Cc>; Table 6-4. Condition Code Mask Descriptions - Intel i960 Jx Developer's Manual

Microprocessor
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6.2.1
ADD<cc>
Mnemonic:
addono
addog
addoe
addoge
addol
addone
addole
addoo
addino
addig
addie
addige
addil
addine
addile
addio
Format:
add*
Description:
Conditionally adds src2 and src1 values and stores the result in dst based on
the AC register condition code. When for Unordered the condition code is 0,
or when for all other cases the logical AND of the condition code and the
mask part of the opcode is not 0, then the values are added and placed in the
destination. Otherwise the destination is left unchanged.
condition code mask for each instruction. The mask is in opcode bits 4-6.

Table 6-4. Condition Code Mask Descriptions

Instruction
addono
addino
addog
addig
addoe
addie
addoge
addige
addol
addil
INSTRUCTION SET REFERENCE
Add Ordinal if Unordered
Add Ordinal if Greater
Add Ordinal if Equal
Add Ordinal if Greater or Equal
Add Ordinal if Less
Add Ordinal if Not Equal
Add Ordinal if Less or Equal
Add Ordinal if Ordered
Add Integer if Unordered
Add Integer if Greater
Add Integer if Equal
Add Integer if Greater or Equal
Add Integer if Less
Add Integer if Not Equal
Add Integer if Less or Equal
Add Integer if Ordered
src1,
src2,
reg/lit
reg/lit
Mask
Condition
000
Unordered
2
001
Greater
2
010
Equal
2
011
Greater or equal
2
100
Less
2
dst
reg
Table 6-4
shows the
6-7
6

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