Figure D-19. Imsk (Interrupt Mask) Registers - Intel i960 Jx Developer's Manual

Microprocessor
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REGISTER AND DATA STRUCTURES
Dedicated External Interrupt Mask Bits - IMSK.xim
(0) Masked
(1) Not Masked
Timer Interrupt Mask Bits - IMSK.tim
(0) Masked
(1) Not Masked
28
24
Interrupt Mask Register (IMSK) Dedicated Mode
Expanded External Interrupts Mask Bits - IMSK.eim
(0) Masked
(1) Not Masked
Timer Interrupt Mask Bits - IMSK.tim
(0) Masked
(1) Not Masked
28
24
Interrupt Mask Register (IMSK) Expanded Mode
Expanded External Interrupt Mask Bits - IMSK.eim
(0) Masked
(1) Not Masked
Dedicated External Interrupt Mask Bits - IMSK.xim
(0) Masked
(1) Not Masked
Timer Interrupt Mask Bits - IMSK.tim
(0) Masked
(1) Not Masked
28
24
Interrupt Mask Register (IMSK) Mixed Mode

Figure D-19. IMSK (Interrupt Mask) Registers

Section 11.7.5.1, "Interrupt Mask (IMSK) and Interrupt Pending (IPND) Registers" (pg. 11-25)
D-18
t
t
i
i
m
m
1
0
20
16
12
t
t
i
i
m
m
0
1
20
16
12
t
t
i
i
m
m
1
0
20
16
12
x
x
x
x
x
x
x
x
i
i
i
i
i
i
i
i
m
m
m
m
m
m
m
m
7
6
5
4
3
2
1
0
8
4
0
x
x
x
x
x
x
x
e
i
i
i
i
i
i
i
i
m
m
m
m
m
m
m
m
7
6
5
4
3
2
1
8
4
0
x
x
x
x
x
x
x
e
i
i
i
i
i
i
i
i
m
m
m
m
m
m
m
m
7
6
5
4
3
2
1
8
4
0

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