Table 6-9. Condition Code Mask Descriptions - Intel i960 Jx Developer's Manual

INSTRUCTION SET REFERENCE
The following table shows the condition code mask for each instruction. The
mask is in bits 0-2 of the opcode.

Table 6-9. Condition Code Mask Descriptions

Instruction
cmpibno
cmpibg
cmpibe
cmpibge
cmpibl
cmpibne
cmpible
cmpibo
cmpobg
cmpobe
cmpobge
cmpobl
cmpobne
cmpoble
cmpibo always branches; cmpibno never branches.
Action: if(src1 < src2)
AC.cc = 100
else if(src1 == src2)
AC.cc = 010
else
AC.cc = 001
if((mask && AC.cc) != 000
{ temp[31:2] = sign_extension(targ[12:2]);
IP[31:2] = IP[31:2] + temp[31:2];
IP[1:0] = 0;
STANDARD
Faults:
Example: # Assume g3 < g9
cmpibl g3, g9, xyz # g9 is compared with g3;
# assume 19
cmpobge 19, r7, xyz # 19 is compared with r7;
6-36
Branch
Mask
Condition
000 No Condition
2
001 src1 > src2
2
010 src1 = src2
2
011 src1 src2
2
src1 < src2
100
2
src1 src2
101
2
110 src1 src2
2
111 Any Condition
2
001 src1 > src2
2
010 src1 = src2
2
src1 src2
011
2
src1 < src2
100
2
101 src1 src2
2
110 src1 src2
2
;
2
;
2
;
2
)
2
Refer to section 6.1.6, "Faults" (pg.
# IP xyz.
r7
# IP xyz.
6-5).