Intel i960 Jx Developer's Manual page 559

Microprocessor
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Supervisor Stack
The address of the first byte of the supervisor stack. The supervisor stack
Pointer
pointer is contained in bytes 12 through 15 of the system procedure table
and the trace table.
Supervisor Stack
The procedure stack that the processor uses when in supervisor mode.
System Call
An explicit procedure call made with the
of system calls are a system-local call and system-supervisor call. On a
system call, the processor gets a pointer to the system procedure through
the system procedure table.
System Data
One of three IMI components. The following system data structures
Structures
contain values the processor requires for initialization: PRCB, IBR,
system procedure table, control table, interrupt table.
System Procedure
An architecturally-defined data structure that contains pointers to system
Table
procedures and (optionally) to fault handling procedures. It also contains
the supervisor stack pointer and the trace control flag.
Trace Table
An architecturally-defined data structure that contains pointers to
trace-fault-handling procedures. The trace table has the same structure as
the system procedure table.
Trace Control Bit
Bit 0 of byte 12 of the system procedure table. This bit specifies the new
value of the trace enable bit when a supervisor call causes a switch from
user mode to supervisor mode. Setting this bit to 1 enables tracing; setting
it to 0 disables tracing.
Trace Controls
A 32-bit register that controls processor tracing facilities. This register
(TC) Register
contains one event bit and one mode bit for each trace fault subtype (i.e.,
instruction, branch, call, return, prereturn, supervisor and breakpoint).
The mode bits enable the various tracing modes; the event flags indicate
that a particular type of trace event has been detected. All the unused bits
in this register are reserved and must be set to 0.
Trace Enable Bit
PC register bit 0. This bit determines whether trace faults are to be
generated (1) or not generated (0).
Trace Fault
PC register bit 10. This flag indicates that a trace event has been detected
Pending Flag
(1) but not yet generated. Whenever the processor detects a trace fault at
the same time that it detects a non-trace fault, it sets the trace fault
pending flag then calls the fault handling procedure for the non-trace
fault. On return from the fault procedure for the non-trace fault, the
processor checks the trace fault pending flag. If set, it generates the trace
fault and handles it.
GLOSSARY
calls
instruction. The two types
Glossary-7

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