Table of Contents
Advertisement
11.5
INTERRUPT STACK AND INTERRUPT RECORD
The interrupt stack can be located anywhere in the non-reserved address space. The processor
obtains a pointer to the base of the stack during initialization. The interrupt stack has the same
structure as the local procedure stack described in
Procedure Stack" (pg.
7-2). As with the local stack, the interrupt stack grows from lower addresses
to higher addresses.
The processor saves the state of an interrupted program, or an interrupted interrupt procedure, in a
record on the interrupt stack.
31
31
Stack
Growth
Figure 11-3. Storage of an Interrupt Record on the Interrupt Stack
The interrupt record is always stored on the interrupt stack adjacent to the new frame that is created
for the interrupt handling procedure. It includes the state of the AC and PC registers at the time the
interrupt was serviced and the interrupt vector number used. Relative to the new frame pointer
(NFP), the saved AC register is located at address NFP-12, the saved PC register is located at
address NFP-16.
In the i960 Jx processor, the stack is aligned to a 16-byte boundary. When the processor needs to
create a new frame on an interrupt call, it adds a padding area to the stack so that the new frame
starts on a 16-byte boundary.
Figure 11-3
shows the structure of this interrupt record.
Current Stack
(Local, Supervisor, or Interrupt Stack)
Current Frame
Interrupt Stack
Padding Area
Optional Data
(not used by 80960Jx)
Saved Process Controls Register
Saved Arithmetic Controls Register
New Frame
INTERRUPTS
section 7.1.1, "Local Registers and the
0
FP
0
NFP-16
Interrupt
NFP-12
Record
Vector Number
NFP-8
NFP
Reserved
11
11-7
Advertisement
Table of Contents
