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INTERRUPTS
Dedicated External Interrupt Mask Bits - IMSK.xim
(0) Masked
(1) Not Masked
Timer Interrupt Mask Bits - IMSK.tim
(0) Masked
(1) Not Masked
28
Interrupt Mask Register (IMSK) Dedicated Mode
Expanded External Interrupts Mask Bits - IMSK.eim
(0) Masked
(1) Not Masked
Timer Interrupt Mask Bits - IMSK.tim
(0) Masked
(1) Not Masked
28
Interrupt Mask Register (IMSK) Expanded Mode
Expanded External Interrupt Mask Bits - IMSK.eim
(0) Masked
(1) Not Masked
Dedicated External Interrupt Mask Bits - IMSK.xim
(0) Masked
(1) Not Masked
Timer Interrupt Mask Bits - IMSK.tim
(0) Masked
(1) Not Masked
28
Interrupt Mask Register (IMSK) Mixed Mode
RESERVED
(INITIALIZE TO 0)
Figure 11-11. Interrupt Mask (IMSK) Registers
11-26
24
20
16
24
20
16
24
20
16
t
x
x
x
x
x
t
i
i
i
i
i
i
i
m
m
m
m
m
m
m
1
0
7
6
5
4
3
12
8
4
t
t
x
x
x
x
x
i
i
i
i
i
i
i
m
m
m
m
m
m
m
0
7
6
5
4
3
1
12
8
4
x
x
x
x
x
t
t
i
i
i
i
i
i
i
m
m
m
m
m
m
m
0
7
6
5
4
3
1
12
8
4
x
x
x
i
i
i
m
m
m
2
1
0
0
x
x
e
i
i
i
m
m
m
2
1
0
x
x
e
i
i
i
m
m
m
2
1
0
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