Precise And Imprecise Faults; Asynchronous Faults - Intel i960 Jx Developer's Manual

Microprocessor
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8.9

PRECISE AND IMPRECISE FAULTS

As described in
section 8.10.5, "PARALLEL Faults" (pg.
parallel and out-of-order instruction execution — allows some faults to be generated together.
The processor provides two mechanisms for controlling the circumstances under which faults are
generated: the AC register no-imprecise-faults bit (AC.nif) and the instructions that synchronize
faults. See
section 8.9.5, "Controlling Fault Precision" (pg. 8-20)
categorized as precise, imprecise and asynchronous. The following subsections describe each.
8.9.1
Precise Faults
A fault is precise if it meets all of the following conditions:
The faulting instruction is the earliest instruction in the instruction issue order to generate a fault.
All instructions after the faulting instruction, in instruction issue order, are guaranteed not to
have executed.
TRACE and PROTECTION.LENGTH faults are always precise. Precise faults cannot be found in
parallel records with other precise or imprecise faults.
8.9.2
Imprecise Faults
Faults that do not meet all of the requirements for precise faults are considered imprecise. For
imprecise faults, the state of execution of instructions surrounding the faulting instruction may be
unpredictable. When instructions are executed out of order and an imprecise fault occurs, it may
not be possible to access the source operands of the instruction. This is because they may have
been modified by subsequent instructions executed out of order. However, the RIP of some
imprecise faults (e.g., ARITHMETIC) points to the next instruction that has not yet executed and
guarantees the return from the fault handler to the original flow of execution. Faults that the
architecture allows to be imprecise are OPERATION, CONSTRAINT, ARITHMETIC and TYPE.
8.9.3

Asynchronous Faults

Asynchronous faults are those whose occurrence has no direct relationship to the instruction
pointer. This group includes MACHINE faults, which are not implemented on the 80960Jx.
8-27), the i960 architecture — to support
for more information. Faults are
FAULTS
8
8-19

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