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Sign and sign extension are not considered when ordinal loads and stores are performed; the values
may, however, be zero-extended or truncated. A short word or byte load to a register causes the
value loaded to be zero-extended to 32 bits. A short word or byte store to memory truncates an
ordinal value in a register to fit the size of the destination memory. No overflow condition is
signalled in this case.
2.1.3
Bits and Bit Fields
The processor provides several instructions that perform operations on individual bits or bit fields
within register operands. An individual bit is specified for a bit operation by giving its bit number
and register. Internal registers always follow little endian byte order; the least significant bit
corresponds to bit 0 and the most significant bit corresponds to bit 31.
A bit field is any contiguous group of bits (up to 32 bits long) in a 32-bit register. Bit fields do not
span register boundaries. A bit field is defined by giving its length in bits (1-32) and the bit number
of its lowest numbered bit (0-31).
Loading and storing bit and bit-field data is normally performed using the ordinal load (
store (
sto
) instructions. When an
the processor appends sign extension bits. A byte or short store can signal an integer overflow
condition.
2.1.4
Triple- and Quad-Words
Triple- and quad-words refer to consecutive words in memory or in registers. Triple- and
quad-word load, store and move instructions use these data types to accomplish block movements.
No data manipulation (sign extension, zero extension or truncation) is performed in these instruc-
tions.
Triple- and quad-word data types can be considered a superset of the other data types described.
The data in each word subset of a quad-word is likely to be the operand or result of an ordinal,
integer, bit or bit field instruction.
2.1.5
Register Data Alignment
Several of the processor's instructions operate on multiple-word operands. For example, the
load-long instruction (
) loads two words from memory into two consecutive registers. The least
ldl
significant data word is loaded into the lower order register. The most significant data word is
loaded into the higher order register.
DATA TYPES AND MEMORY ADDRESSING MODES
ldi
instruction loads a bit or bit field value into a 32-bit register,
2
) and
ldo
2-3
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