Download  Print this page

Intel ® Core i7 User Manual

Qm57 express chipset
Hide thumbs


Core™ i7 Processor with
QM57 Express Chipset
Development Kit User Guide
December 2009
Revision 001



  Related Manuals for Intel Intel® Core i7

  Summary of Contents for Intel Intel® Core i7

  • Page 1 ® Intel Core™ i7 Processor with ® Intel QM57 Express Chipset Development Kit User Guide December 2009 Revision 001 323094...
  • Page 2 Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at
  • Page 3: Table Of Contents

    Contents About This Manual ....................7 Content Overview ..................7 Text Conventions ..................7 Glossary of Terms and Acronyms............... 9 Related Documents ................14 Development kit Technical Support ............14 1.5.1 Online Support................. 14 1.5.2 Additional Technical Support ............14 Getting Started ....................
  • Page 4 Table 7. Hardware Straps for processor PCI Express* Interface Usage ....28 Table 8. PCI Express* Ports ................30 ® Table 9. Selection of I/O Voltage for the Intel High Definition Audio ...... 31 Table 10. SATA Ports ..................31 Table 11.
  • Page 5 Table 14. Digital Multimeter ................39 Table 15. Power Measurement Resistor for Power Rails ......... 39 Table 16. Component Location ................45 Table 17. Connectors on the motherboard ............47 Table 18. Back Panel Connectors ................ 48 Table 19. Configuration Jumper/Switches Settings ..........48 Table 20.
  • Page 6: Revision History

    Revision History Document Revision Description Revision Date Number Number 323094 Public release. December 2009 § 323094 Dev Kit Manual...
  • Page 7: About This Manual

    It gives a description of jumper settings and functions. The chapter also explains the use of the programming headers. Daughter and Plug-in Cards contains information on add-in cards available from Intel that can be used with the development board. 1.2 Text Conventions Throughout this document: ®...
  • Page 8: Table 1. Text Conventions

    Table 1. Text Conventions Notation Definition The pound symbol (#) appended to a signal name indicates that the signal is active low. (e.g., PRSNT1#) Variables Variables are shown in italics. Variables must be replaced with correct values. INSTRUCTIONS Instruction mnemonics are shown in uppercase. When you are programming, instructions are not case-sensitive.
  • Page 9: Glossary Of Terms And Acronyms

    1.3 Glossary of Terms and Acronyms Table 2 defines conventions and terminology used throughout this document. Table 2. Terms Term/Acronym Definition Aggressor A network that transmits a coupled signal to another network. Anti-etch Any plane-split, void or cutout in a VCC or GND plane. Bus Agent A component or group of components that, when combined, represent a single load on the AGTL+ bus.
  • Page 10 USB connectors. ® ® IMVP6.5 The Intel Mobile Voltage Positioning specification for the Intel Core™ i5 Processor. It is a DC-DC converter module that supplies the required voltage and current to a single processor. Inter-Symbol...
  • Page 11: Table 3. Acronyms

    Term/Acronym Definition Undershoot The minimum voltage extending below VSS observed for a signal at the device pad. VCC (CPU core) VCC (CPU core) is the core power for the processor. The system bus is terminated to VCC (CPU core). Victim A network that receives a coupled crosstalk signal from another network is called the victim network.
  • Page 12 High Definition Audio HDMI High Definition Media Interface High-speed. Refers to USB I/O Controller Hub Integrated Drive Electronics IMVP Intel Mobile Voltage Positioning IP/IPv6 Internet Protocol/Internet Protocol version 6 IrDA Infrared Data Association Inter-Symbol Interference Keyboard Controller Logic Analyzer Interface...
  • Page 13 Acronym Definition Operating System Original Equipment Manufacturer Printed Circuit Board PCIe PCI Express* Platform Controller Hub Pulse Code Modulation PCI Express* Graphics Pin Grid Array Platform LAN Connect Phase Locked Loop POST Power On Self Test RAID Redundant Array of Inexpensive Disks Real Time Clock SATA Serial ATA...
  • Page 14: Related Documents

    This information is available 24 hours per day, 7 days per week, providing technical information whenever you need it. 1.5.2 Additional Technical Support If you require additional technical support, please contact your Intel Representative or local distributor. 323094 Dev Kit Manual...
  • Page 15: Getting Started

    One SATA DVD-ROM Drive SATA Cabling (Data and power)  One PCI Extension Card (codename Thimble Peak 2)  One 2x8 PCIe Add-in card (codename NOWATA) Current drivers required for this development kit are available at Dev Kit Manual 323094...
  • Page 16: Additional Required Hardware Not Included In This Kit

    2.2 Additional Required Hardware Not Included In This Kit The following additional hardware may be necessary to successfully set up and operate the system:  VGA Monitor: Any standard VGA or multi-resolution monitor may be used. The setup instructions in this chapter assume the use of a standard VGA monitor, TV, or flat panel monitor.
  • Page 17: System Setup

    1. The power supply cord is the main disconnect device to main power (AC power). The socket outlet should be installed near the equipment and should be readily accessible. 2. To avoid shock, ensure that the power cord is connected to a properly wired and grounded receptacle.
  • Page 18: System Power-Up

    4 seconds. Note: Intel does not recommend powering down the board by removing power at the ATX power supply by either unplugging the power supply from the AC source/wall or by unplugging the DC power at the board.
  • Page 19: Programming Bios Using A Bootable Usb Device

    MAC Address Programming Software Utility: eeupdate.exe BIOS collateral can be obtained from 6. Record the 12 digit MAC Address of the board from the sticker near the CPU. 7. Insert the Bootable USB Key into one of the USB Ports on the motherboard.
  • Page 20: Instructions To Flash Bios On Spi

    2.9 Instructions to flash BIOS on SPI ® ® The Intel Core™ i7 Processor with Intel QM57 Express Chipset Development kit requires the use of a two-partition SPI image for SPI-0 and SPI-1 respectively. The Descriptors sit on SPI-0 while the BIOS on SPI-1.
  • Page 21: Development Board Features

    Development Board Features 3.1 Block Diagram ® ® The block diagram of the Intel Core™ i7 Processor with Intel QM57 Express Chipset Development kit is shown in Figure Figure 1. System Block Diagram PCIe* Graphics (GEN1/GEN2) (eDP) PEG x16 /eDP IMVP6.5...
  • Page 22: Table 5. Development Kit Feature Set Summary

    Table 5. Development Kit Feature Set Summary Description Comments Soldered to board Processor ® Intel Core™ i5 ® Intel 5 Series Chipset 1071 pin BGA footprint Chipset Two DDR3 DIMM slots Maximum 8GB of DDR Memory (RAM) of ECC and non-ECC using 2Gb...
  • Page 23: Driver Key Features

    Description Comments Support via interposer Mott ® Intel High Definition Canyon 4 daughter card (support Soft Audio/Soft Modem Audio MDC via sideband cable) Header 14 USB 2.0/1.1 Ports 1 Quad USB connector 1 dual USB connector on RJ45 8 ports available as FPIOs Optional routing to docking for USB lane 4 Over Current protection provided in Pairs.
  • Page 24: Bios Key Features

    Windows* XP/XP Embedded, Linux*, and others. The following features of AMI* BIOS are enabled in the development board:  DDR3 detection, configuration, and initialization ®  Intel QM57 Chipset configuration  POST codes displayed to port 80h  PCI/PCI Express* device enumeration and configuration ...
  • Page 25: Processor

    3.7.1 Processor ® The development kit uses the board design, which supports Intel Core™ i7 processor in a BGA package (U3E1). This processor is a 2-die package made up of the dual core processor, graphics processor and integrate memory controller.
  • Page 26: Figure 2. Vid Override Circuit

    Figure 2. VID Override Circuit Graphics Core VR The development kit implements an onboard IMVP-6.5 compliant VR Controller for the Graphics core supply. The maximum current that can be supported by the core VR is 21 amps. Manual VID Support for Graphics VR The development kit supports manual VID operation for Graphics VR.
  • Page 27: Table 6. Supported Dimm Module Configurations

     Raw Card D – single rank x8 unbuffered ECC  Raw Card E – dual rank x8 unbuffered ECC  Raw Card F - dual rank x16 unbuffered non-ECC Table 6. Supported DIMM Module Configurations DIMM DRAM DRAM # of # of # of # of...
  • Page 28: Table 7. Hardware Straps For Processor Pci Express* Interface Usage

    FDI, a new interface. On this platform, the GPU is in the ® processor and display interfaces are supported through the chipset. The Intel FDI is a dedicated link to transmit the display related pixel information over unidirectional 2x4 lane interfaces.
  • Page 29: Chipset

    3.7.2 Chipset ® The chipset on the development kit is the Intel 5 Series Chipset. It provides the interface optimized for the Processor, DMI and a highly integrated I/O hub that provides the interface to peripherals. The following sections describe the motherboard implementation of the Chipset features which are listed as below: ...
  • Page 30: Figure 3. Block Diagram Of On-Board Lan Implementations On-Board LAN ® The development kit supports 10/100/1000 Mbps Ethernet on board via the Intel 82577 GbE PHY. It has a PCI-E and SM-BUS link to the Chipset. Data Transfer happens over PCI-E lanes. Communication between the LAN Controller and the LAN Connected Device is done through SMBus whenever the system is in a low power state (Sx).
  • Page 31: Table 9. Selection Of I/O Voltage For The Intel ® High Definition Audio

    High Definition Audio functionality (Intel HD Audio) is enabled through the Mott Canyon 4 daughter card. The Chipset supports four Intel HD Audio CODECs. All four are routed to MDC header through resistor stuffing options. By default CODEC 0 and 1 will be connected to the MDC card.
  • Page 32: Table 11. Usb Port Mapping

     IO headers are provided for the other 8 USB lanes. Over current protection has been provided for ports in pairs. Ports (0,1), (1,2)…(12,13) share the OC Indicators. Table 11. USB Port Mapping USB Port Panel Connector Port 0 Back Panel I/O Connector J3A3 (4 stacked USB Connector) Port 1 Back Panel I/O Connector...
  • Page 33: Table 12. Jumper Setting For Spi Programming

    If the intention is just to read thermal information from the Chipset by external EC/Fan controller, only Chipset SM-Bus signals (SML1_CLK and SML1_DATA) from the LPC sideband connector can be used without connecting the EC on LPC slot. ® For more information on the embedded controller please refer to Intel Management Engine ® ®...
  • Page 34: Figure 4. Bclk Frequency Select Circuit

    CPUSTP# is not supported as the requirement is to have this clock always running during buffered mode. Figure 4. BCLK Frequency Select Circuit The clocks on the motherboard are provided by the chipset which uses four clocks from CK505 as inputs and use these as a reference to generate all the other platform clocks. A general block diagram is shown in Figure 5.
  • Page 35: Displays

    Figure 5. Platform Clocking Circuit ® Intel QM57 Express Chipset Real Time Clocks (RTC) An on-board battery at BT5G1 maintains power to the real time clock (RTC) when in a mechanical off state. A CR2032 battery is installed on the motherboard.
  • Page 36 Note: A maximum of two displays can be active at a time. Note: Display connectors DP/HDMI are on Port D of Chipset, Port B and C can be used through PCI graphics add-in-card. 6. One DP and one HDMI Connector have been provided on board on the motherboard. Port D of Digital Display Interface on PCH is mapped to on board DP and HDMI connectors.
  • Page 37: Figure 6. Intel Core™ I7 Processor Based Low-Power Platform Display Interfaces

    ® Figure 6. Intel Core™ i7 Processor Based Low-Power Platform Display Interfaces Secondary Slot Primary Slot Add-in-Card x16 PCIe Connector x16 PCIe Connector Processor 1x16 PCIe (0:15) Docking GPIO from HDMI TRAN Chipset Back Connector Panel LVDS Connector Resistor Strapping...
  • Page 38: Debugging Interfaces Power Supply Solution The motherboard contains all of the voltage regulators necessary to power the system up. Note: Use an “ATX12V” 1.1 Spec compliant power supply (an "ATX12V" rating means V5 min current =0.1 A, "ATX" V5 min current = 1.0 A, among other differences). Note: If the power button on the ATX power supply is used to shut down the system, wait at least five seconds before turning the system on again.
  • Page 39: Table 14. Digital Multimeter

    power measurement resistors are 2mOhm by default. Power on a particular subsystem is calculated using the following formula:  R = value of the sense resistor (typically 0.002Ω) V = the voltage difference measured across the sense resistor. It is recommended that the user use a high precision digital multimeter tool such as the Agilent* 34401A digital multi-meter.
  • Page 40 REFDES of the Voltage Rail Name Power Measurement Resistor +VDC_PHASE R3B23 +V1.05S_PCH_VCC R6U15 MAX8792_V1.05SVTT_LX_L R4F1 MAX8792_V1.05M_LX_L R6E8 +V5S_HDMID_OB R2A2 1.5_VIN R3W26 +V3.3S_DP_OB R5N1 +V5A_USBPWR_IN R3A1 +V1.05S_VCC_SA R4D10 +V3.3A_MBL R4H1 +V1.8S_VCCSFR R4D4 MAX8792_V1.1SVTT_VIN R5G1 +V1.05S_VCCTT R4R2 -V12A R4H7 +V5SB_ATXA R4H8 +V1.05S_VCC_PEG_DMI R4D9 +V1.8S R5E1...
  • Page 41 REFDES of the Voltage Rail Name Power Measurement Resistor +V5S_SATA_P1 R7W1 +V1.05M_VCCEPW R7T26 +VDD_VDL R7D3 +V3.3S_1.5S_HDA_IO R8R9 +VCC_LVDS_BKLT R8D1 +V3.3S_PCIESLOT6 R8C1 +V12S_PCIESLOT6 R8B1 +V5_LPCSLOT R8T8 +V5_PS2 R8N1 +V3.3_LPCSLOT R8U1 +V3.3A_1.5A_HDA_IO R8R11 +V3.3A_KBC R8H13 +V3.3S_VCCPPCI R8U3 +V3.3M_SPI R8R5 +V3.3S_IR R8M4 +V3.3S_DPS R8B4 +V12S_DPS R8N4...
  • Page 42 REFDES of the Voltage Rail Name Power Measurement Resistor +V3.3S_SATA_P1 R6W18 +V1.1S_VCC_SATA R7V2 +V3.3S_SIO R9M10 +V3.3_KBCS R9E6 51125_VIN R5G6 +V5S_IMVP6 R3B20 +V3.3S_DIMM1 R2G15 +V3.3S_DIMM0 R2G4 +V1.05S_VCC_DMI R6U19 +VCCA_DPLL_L R6E9 +V3.3S_VCCA3GBG R6U10 +V3.3S_CRT_VCCA_DAC R7E15 +V3.3M_VCCPEP R7U17 +V_NVRAM_VCCPNAND R7V1 +V1.0M_LAN R7A8 +V3.3A_VCCPUSB R7F3 +V1.5S_1.8S_VCCADMI_VRM R6U11...
  • Page 43: Power Supply Usage And Recommendation

    3.7.7 Power Supply Usage and Recommendation As the Desktop ATX supplies grew to meet the increased power for those motherboards, their minimum loading requirements also grew. When running a mobile platform on it, it may not load the 5.0V rail enough to meet the minimum loading requirements for it to maintain regulation.
  • Page 44: Development Board Physical Hardware Reference

    Development Board Physical Hardware Reference This section provides reference information on the physical hardware, including component‟s locations, connector pinout information and jumper settings. 4.1 Primary Features Figure 7 Figure 8 show the major components of the motherboard, top and bottom views respectively).
  • Page 45: Figure 8. Component Locations - Bottom View

    Figure 8. Component Locations – Bottom View Table 16. Component Location Item Description SMSC IO PCIe* Slot 6 (No_Stuff) Infra red port LAN Docking switch PCIe Slot3 PCIe Slot 4 Dev Kit Manual 323094...
  • Page 46 Item Description PCI-e Slot 5 DP Docking Switch RS232 Transceiver PCIe Slot 1 PCIe Slot 2 Chipset JTAG Buffer Onboard display port HDMI LVL translator Onboard HDMI port CPU core VID Override jumper GFx core VID Override jumper Processor XDP CPU heat sink on top of the Processor Power Button...
  • Page 47: Connectors

    Item Description PCI gold finger TPM Header Intel 82577 LAN PHY CK 505 DMI LAI FDI LAI DDR3 VR I2C Port Hub 4.2 Connectors Caution: Many of the connectors provide operating voltage (+5 V DC and +12 V DC, for example) to devices inside the computer chassis, such as fans and internal peripherals.
  • Page 48: Back Panel Connectors

    Item Connector Description U3E1C DDR Channel 1 U3E1D DDR Channel 2 4.2.1 Back Panel Connectors Figure 9. Back Panel Connector Locations Table 18. Back Panel Connectors Item Description Item Description Ref Des Display Port J5A1 HDMI Connector J3A2 RJ-45 USB Ports J4A1 CRT RS-232 J1A2...
  • Page 49 Reference Function Default Setting Optional Setting Designator J5F1 TPM SETTING OUT: Save ME RTC IN: Clear ME RTC Register Register J9E1 TPM FUNCTION OUT: Disabled IN: Enable J9G4 NO REBOOT OUT: Disabled IN: Enabled J6B1 PCH_JTAG_RST# IN: Logic Low OUT: Logic High J6E1 MPC SWITCH CONTROL OUT: MPC Off...
  • Page 50 Reference Function Default Setting Optional Setting Designator J8G5 H8 MODE SELECTION IN: Logic Low OUT: Logic High J8G4 H8 MODE SLECTION OUT: Logic High IN: Logic Low J9F2 SMC/KSC OUT: On board EC IN: On board EC Disabled Enabled J8G6 KBC CORE DEBUG OUT: Enabled IN: Disabled...
  • Page 51: Power On And Reset Push Buttons

    Reference Function Default Setting Optional Setting Designator 1-2: Enable Gfx VID Override J8H1 USB Header 1 – Port 4 and Port 5 – 1-3: USBP4N connected PCIe Slot 1 and Slot 2 2-4: USBP5N connected 5-7: USBP4P grounded 6-8: USBP5P grounded 9-10: no connect J7H3 USB Header 2 –...
  • Page 52: Leds

    Table 20. Power-on and Reset Push Buttons Item Description Power Button SW1E1 Reset Button SW1E2 U3E1 4.5 LEDs The following LEDs in Table 21 provide status of various functions: Table 21. Development lit LEDs Page# on the Reference Function Schematics for Designator reference SATA ACTIVITY...
  • Page 53: Other Headers

    4.6 Other Headers 4.6.1 H8 Programming Header The microcontroller firmware for system management/keyboard/mouse control can be upgraded in two ways. The user can either use a special DOS* utility (in-circuit) or use an external computer connected (remote) to the system via the serial port on the board. If the user chooses to use an external computer connected to the system via the serial port, there are four jumpers that must be set correctly first.
  • Page 54: Table 23. Expansion Slots And Sockets

    Table 23. Expansion Slots and Sockets Reference Slot/Socket Description Detail Designator J4C1 Fan Connector Table _Front_Panel_Header J5J1 Front Panel Header Table 25 J5D1 eDP Support Table 26 J8J1 SATA „Direct Connect‟ Connector Table 27 J7G2, J7G1, SATA Signal Connectors Table 28 J6J1, J7J1 J6H1 SATA Power Connector...
  • Page 55: Table 26. Edp Support Connector

    Signal Definition SATA_LED# Indicates PATA or SATA activity – Active Low Ground Ground PWR_CONN_D System Power – Active Low RST_PUSH#_D System Reset – Active Low Ground 5 volt supply No Connect No Connect Ground Ground Reserved PS_LATCH# 5 volt supply eDP Support (J6D1) Table 26.
  • Page 56: Table 28. Sata Ports 1 And 2/Esata Ports 3 And 4 Pinout (J7G2, J7G1, J6J1, J7J1)

    Signal 8, 9, 10 +3.3V 14, 15, 16 20, 21 ,22 +12V 1, 4, 7, 11 12, 13, 17, 19 Table 28. SATA Ports 1 and 2/eSATA Ports 3 and 4 Pinout (J7G2, J7G1, J6J1, J7J1) Signal 1, 4, 7 Table 29.
  • Page 57: Table 31. Had Header For Mdc Interposer (J9E4)

    Signal Definition Finger Print Power PCH_GPIO24_PWR_EN# Enable HAD Header for MDC Interposer Table 31. HAD Header for MDC Interposer (J9E4) Signal Definition Ground HDA_MDC_SDATAIN2 Data In 2 +V3.3 3.3 volt supply HDA_MDC_SDATAIN23 Data In 3 Reserved HDA_MDC_SDATAIN21 Data In 1 VBATS_HDA_R1 6V –...
  • Page 58: Table 33. Had Header For External Hdmi Support (J8F1) HAD Header for External HDMI Support Table 33. HAD Header for External HDMI Support (J8F1) Signal Definition Ground Reserved +V3.3 3.3 volt supply HDA_SDIN3_R2 SDIN3 R2 Reserved HDA_SDIN3_R1 SDIN3 R1 VBATS_HDA_R2 6V – 14.1V supply HDA_SDIN2_R SDIN2 +V3.3 3.3V HDA_CODEC_3_SDATAOUT SDATAOUT Ground...
  • Page 59: Table 35. Descriptor Security Override (J8F4) Descriptor Security Override Table 35. Descriptor Security Override (J8F4) Signal Definition Ground Ground SMC_LID SMC Lid VIRTUAL_DOCK_DET# Virtual Docking Reserved Ground HDA_DOCK_EN# HAD Docking BIOS_REC BIOS Recovery Ground Ground VIRTUAL_BATTERY Virtual Battery HYBRID_GFX_SW Switchable Graphics Ground Ground RTC_RST# RTC Reset Reserved Controller Link Header...
  • Page 60: Table 37. Tpm Header/Port 80 Add-In-Card Header (J9A1) TPM Header / Port 80 Add-in-Card Header Table 37. TPM Header/Port 80 Add-in-Card Header (J9A1) Signal Definition CLK_PCI_TPM PCI Clock Loopback Ground LPC_FRAME# LPC Frame Reserved BUF_PLT_RST# Reset +V5_R1_TPM 5 volt supply LPC_AD3 LPC Address/Data 3 LPC_AD2 LPC Address/Data 2 +V3.3S_R1_TPM 3.3 volt supply LPC_AD1...
  • Page 61: Table 39. Lpc Side Band Header (J9G2)

  • Page 63: Daughter And Plug-In Cards

    Daughter and Plug-in Cards 5.1 PCIe* Add-in Card The PCIe* add-in card can be used to enable 2 x 8 PCIe* Bifurcation. Note: The eDP on the PCIe add-in card will not work with the processor because of specification change and lane reversal. The PCI graphics card needs to be used to enable eDP. Figure 10.
  • Page 64: Port 80-83 Add-In Card

    LPC docking connector on the evaluation board schematics. No SIO docking support on PCI Expansion card. Note: The PCI Expansion card when plugged into the Development Kit requires support. If not supported board damage may occur. Figure 11. PCI Expansion Card 5.3 Port 80-83 Add-in Card Port 80-83 add-in card plugs to the motherboard through TPM header.
  • Page 65: Figure 13. Block Diagram Of Port 80-83 Add-In Card

    Figure 13. Block Diagram of Port 80-83 Add-in Card TPM Module Header Remote Display Header Display Segment 1 Display Segment 2 EPLD Display Segment 3 Display Segment 4 LPC Header Jumper J1 is used for the configurations as listed in Table Table 40.
  • Page 66: Heatsink Installation Instructions

    Heatsink Installation Instructions It is necessary for the processor to have a thermal solution attached to it in order to keep it within its operating temperatures. Caution: An ESD wrist strap must be used when handling the board and installing the fan/heatsink assembly.
  • Page 67: Figure 15. Bottom View Of The Crb With Backplate In Place

    Examine the base of the fan/heatsink. This is the area where contact with the Processor die is made. This surface should be clean of all materials and greases. Wipe the bottom surface clean with isopropyl alcohol. 3. Place the backplate on the underside of the board as shown in Figure 15.
  • Page 68: Figure 16. Top View Of Board With Pins Installed, Through The Board, And Into The Backplate (Backplate Not Visible)

    Figure 16. Top View of Board With Pins Installed, Through the Board, And Into the Backplate (Backplate not visible) 323094 Dev Kit Manual...
  • Page 69: Figure 17. Applying Thermal Grease To The Top Of Processor Package

    5. Clean the die of the Processor with isopropyl alcohol before the fan/heatsink is installed onto the board. This will ensure that the surface of the die is clean. Remove the tube of thermal grease from the package and use it to coat the exposed die of the CPU with the thermal grease.
  • Page 70: Figure 18. Squeeze Activation Arm Downward, Toward The Board

    6. Pick up the compression assembly and install it onto the board by lowering the compression assembly onto the pins (installed on the board) such that the pins insert into the bottom of the compression assembly. Then slide the compression assembly forward to lock the pins in place.
  • Page 71: Figure 19. Installing Fan/Heatsink

    Figure 19. Installing Fan/heatsink (Slide the fan/heatsink away from compression assembly handle) Compression assembly handle 9. Finally, plug the fan connector for the fan/heatsink onto the CPU fan header on the motherboard. You have now successfully mounted the fan/heatsink assembly to the motherboard.
  • Page 72: Figure 20. Fan/Heatsink Power Plugged Into Board

    Figure 20. Fan/heatsink Power Plugged Into Board 323094 Dev Kit Manual...
  • Page 73: Figure 21. Completed Intel ® Core™ I7 Processor Crb With Fan/Heatsink

    ® Figure 21. Completed Intel Core™ i7 Processor CRB With Fan/heatsink Assembly Installed Dev Kit Manual 323094...