Timer Mode Registers (Tmr0, Tmr1); Figure 10-2. Timer Mode Register (Tmr0, Tmr1) - Intel i960 Jx Developer's Manual

Microprocessor
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10.1.1

Timer Mode Registers (TMR0, TMR1)

The Timer Mode Register (TMRx) lets the user program the mode of operation and determine the
current status of the timer. TMRx bits are described in the subsections following
are summarized in
Table
10-4.
Terminal Count Status - TMRx.tc
(0) No Terminal Count
(1) Terminal Count
Timer Enable - TMRx.enable
(0) Disabled
(1) Enabled
Timer Auto Reload Enable - TMRx.reload
(0) Auto Reload Disabled
(1) Auto Reload Enabled
Timer Register Supervisor Write Control - TMRx.sup
(0) Supervisor and User Mode Write Enabled
(1) Supervisor Mode Only Write Enabled
Timer Input Clock Selects - TMRx.csel1:0
(00) 1:1 Timer Clock = Bus Clock
(01) 2:1 Timer Clock = Bus Clock / 2
(10) 4:1 Timer Clock = Bus Clock / 4
(11) 8:1 Timer Clock = Bus Clock / 8
31
28
Timer Mode Register (TMR0, TMR1)
Reserved
(Initialize to 0)

Figure 10-2. Timer Mode Register (TMR0, TMR1)

24
20
16
Figure 10-2
12
8
4
TIMERS
and
10
0
10-3

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