Data Movement; Load And Store Instructions - Intel i960 Jx Developer's Manual

5.2.1

Data Movement

These instructions are used to:
• move data from memory to global and local registers
• from global and local registers to memory
• between local and global registers
Rules for register alignment must be followed when using load, store and move instructions that
move 8, 12 or 16 bytes at a time. See
alignment requirements for code portability across implementations.
5.2.1.1

Load and Store Instructions

Load instructions copy data from memory to local or global registers. Each load instruction has a
corresponding store instruction to memory. All load and store instructions use the MEM format.
ld load word
ldob load ordinal byte
ldos load ordinal short
ldib
load integer byte
ldis
load integer short
ldl load long
ldt load triple
ldq load quad
copies 4 bytes from memory into a register;
ld
copies 12 bytes into 3 successive registers;
st copies 4 bytes from a register into memory;
copies 12 bytes from 3 successive registers;
For ld , ldob , ldos , ldib and
memory address value is copied into the register. The processor automatically extends byte and
short (half-word) operands to 32 bits according to data type. Ordinals are zero-extended; integers
are sign-extended.
section 3.5, "MEMORY ADDRESS SPACE" (pg. 3-13)
st store word
stob store ordinal byte
stos store ordinal short
stib
store integer byte
stis
store integer short
stl store long
stt store triple
stq store quad
copies 8 bytes into 2 successive registers;
ldl
copies 16 bytes into 4 successive registers.
ldq
stl copies 8 bytes from 2 successive registers;
stq copies 16 bytes from 4 successive registers.
ldis , the instruction specifies a memory address and register; the
INSTRUCTION SET OVERVIEW
for
5
ldt
stt
5-5