Figure 2-2. Data Placement In Registers; Table 2-3. Memory Addressing Modes - Intel i960 Jx Developer's Manual

DATA TYPES AND MEMORY ADDRESSING MODES
Byte
Short
Word
NOTES:
D's are data transferred to/from memory
X's are zeros for ordinal data
X's are sign bit extensions for integer data
2.3 MEMORY ADDRESSING MODES
The processor provides nine modes for addressing operands in memory. Each addressing mode is used
to reference a byte location in the processor's address space.
modes and a brief description of each mode's address elements and assembly code syntax.
Mode
Absolute offset offset (smaller than 4096)
displacement displacement (larger than 4095)
Register Indirect
with offset abase + offset
with displacement abase + displacement
with index abase + (index*scale)
with index and displacement
Index with displacement
instruction pointer (IP) with
displacement
NOTE: reg is register, exp is an expression or symbolic label, and IP is the Instruction Pointer.
2-6
31 24 23
XX
31 24 23
XX
31 24 23
DD
3

Figure 2-2. Data Placement in Registers

Table 2-3. Memory Addressing Modes

Description
abase
abase + (index*scale) +
displacement
(index*scale) + displacement
IP + displacement + 8
16 15 8 7
XX XX
16 15 8 7
XX DD
1
16 15 8 7
DD DD
2 1
Table 2-3 shows the memory addressing
Assembler Syntax
exp
exp
(reg)
exp (reg)
exp (reg)
(reg) [reg*scale]
exp (reg)
[reg*scale]
exp [reg*scale]
exp (IP)
0
DD
0
0
DD
0
0
DD
0
Inst.
Type
MEMA
MEMB
MEMB
MEMA
MEMB
MEMB
MEMB
MEMB
MEMB