Boundary Scan Description Language Example; Figure 15-5. Timing Diagram Illustrating The Loading Of Data Register - Intel i960 Jx Developer's Manual

Microprocessor
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TEST FEATURES
TCK
TMS
Controller State
TDI
Data input to IR
IR shift-register
INSTRUCTION
Parallel output of IR
Data input to TDR
TDR shift-register
OLD DATA
Parallel output of TDR
Register Selected
INACTIVE
TDO enable
TDO

Figure 15-5. Timing diagram illustrating the loading of Data Register

15.3.7

Boundary Scan Description Language Example

Boundary-Scan Description Language (BSDL)
of describing essential features of ANSI/IEEE 1149.1-1993 compliant devices.
15-18
TEST DATA REGISTER
ACT.
INACTIVE
ACTIVE
= Don't care or undefined
Example 15-1
ID CODE
NEW DATA
INACTIVE
meets the de facto standard means

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