Table 6-11. Dcctl Operand Fields - Intel i960 Jx Developer's Manual

INSTRUCTION SET REFERENCE
6.2.23 dcctl
Mnemonic: dcctl
src1,
Format:
reg/lit
Description: Performs management and control of the data cache including disabling,
enabling, invalidating, ensuring coherency, getting status, and storing cache
contents to memory. Operations are indicated by the value of src1. src2 and
src/dst are also used by some operations. When needed by the operation, the
processor orders the effects of the operation with previous and subsequent
operations to ensure correct behavior.
Function
Disable D-cache
Enable D-cache
Global invalidate
D-cache
Ensure cache
coherency
Get D-cache
status
Reserved
Store D-cache to
memory
Reserved
Quick invalidate
Reserved
1. Invalidates data cache on 80960Jx.
6-40
Data-cache Control
src2, src/dst
reg/lit reg

Table 6-11. dcctl Operand Fields

src1
0
1
2
3
1
4
5
6
7
8
9
src2 src/dst
NA NA
NA NA
NA NA
NA NA
src: NA
dst: Receives
NA
D-cache status
(see Figure
NA NA
Destination src : D-cache set
address for #'s to be stored
cache sets (see Figure
NA NA
1 NA
NA NA
6-1).
6-1).