Intel i960 Jx Developer's Manual page 218

Microprocessor
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INSTRUCTION SET REFERENCE
else
store_to_memory(effective_address)[15:0] = src1[15:0];
stl:
if (illegal_write_to_on_chip_RAM_or_MMR)
generate_fault(TYPE.MISMATCH);
else if (reg_number(src1) % 2 != 0)
generate_fault(OPERATION.INVALID_OPERAND);
else if ((effective_address[2:0] !=
{
}
else
{
}
stt:
if (illegal_write_to_on_chip_RAM_or_MMR)
generate_fault(TYPE.MISMATCH);
else if (reg_number(src1) % 4 != 0)
generate_fault(OPERATION.INVALID_OPERAND);
else if ((effective_address[3:0] !=
{
}
else
{
}
stq:
if (illegal_write_to_on_chip_RAM_or_MMR)
generate_fault(TYPE.MISMATCH);
else if (reg_number(src1) % 4 != 0)
generate_fault(OPERATION.INVALID_OPERAND);
else if ((effective_address[3:0] !=
{
6-106
store_to_memory(effective_address)[31:0] = src1;
store_to_memory(effective_address + 4)[31:0] = src1_+_1;
generate_fault (OPERATION.UNALIGNED);
store_to_memory(effective_address)[31:0] = src1;
store_to_memory(effective_address + 4)[31:0] = src1_+_1;
store_to_memory(effective_address)[31:0] = src1;
store_to_memory(effective_address + 4)[31:0] = src1_+_1;
store_to_memory(effective_address + 8)[31:0] = src1_+_2;
generate_fault (OPERATION.UNALIGNED);
store_to_memory(effective_address)[31:0] = src1;
store_to_memory(effective_address + 4)[31:0] = src1_+_1;
store_to_memory(effective_address + 8)[31:0] = src1_+_2;
store_to_memory(effective_address)[31:0] = src1;
store_to_memory(effective_address + 4)[31:0] = src1_+_1;
store_to_memory(effective_address + 8)[31:0] = src1_+_2;
) && unaligned_fault_enabled)
) && unaligned_fault_enabled)
) && unaligned_fault_enabled)

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