Intel i960 Jx Developer's Manual page 183

Microprocessor
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ldib:
dst[7:0] = read_memory(effective_address)[7:0];
if(dst[7] == 0)
dst[31:8] = 0x000000;
else
dst[31:8] = 0xFFFFFF;
ldos:
dst = read_memory(effective_address)[15:0];
dst[31:16] = 0x0000;
if((effective_address[0] != 0
generate_fault(OPERATION.UNALIGNED);
ldis:
dst[15:0] = read_memory(effective_address)[15:0];
if(dst[15] == 0
)
2
dst[31:16] = 0x0000;
else
dst[31:16] = 0xFFFF;
if((effective_address[0] != 0
generate_fault(OPERATION.UNALIGNED);
ldl:
if((reg_number(dst) % 2) != 0)
generate_fault(OPERATION.INVALID_OPERAND);
# dst not modified.
else
{
dst = read_memory(effective_address)[31:0];
dst_+_1 = read_memory(effective_address_+_4)[31:0];
if((effective_address[2:0] != 000
generate_fault(OPERATION.UNALIGNED);
}
ldt:
if((reg_number(dst) % 4) != 0)
generate_fault(OPERATION.INVALID_OPERAND);
# dst not modified.
else
{
dst = read_memory(effective_adddress)[31:0];
dst_+_1 = read_memory(effective_adddress_+_4)[31:0];
INSTRUCTION SET REFERENCE
# Order depends on endianism. See
#
section 2.2.2, "Byte Ordering" (pg. 2-4)
) && unaligned_fault_enabled)
2
# Order depends on endianism. See
#
section 2.2.2, "Byte Ordering" (pg. 2-4)
) && unaligned_fault_enabled)
2
) && unaligned_fault_enabled)
2
6
6-71

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