Table B-4. Ctrl Format Instruction Encodings; Table B-5. Cycle Counts For Sysctl Operations - Intel i960 Jx Developer's Manual

Microprocessor
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Table B-4. CTRL Format Instruction Encodings

08
b
09
call
0A
ret
0B
bal
10
bno
11
bg
12
be
13
bge
14
bl
15
bne
16
ble
17
bo
18
faultno
19
faultg
1A
faulte
1B
faultge
1C
faultl
1D
faultne
1E
faultle
1F
faulto
1. Indicates that it takes 1 cycle to execute the instruction plus an additional cycle to fetch the target instruction
if the branch is taken.

Table B-5. Cycle Counts for sysctl Operations

Operation
Post Interrupt
Purge I-cache
Enable I-cache
Disable I-cache
Software Reset
Load Control Register Group
Request Breakpoint Resource
OPCODES AND EXECUTION TIMES
31............24
1
1 + 1
0000 1000
7
0000 1001
6
0000 1010
1 + 1
0000 1011
1 + 1
0001 0000
1 + 1
0001 0001
1 + 1
0001 0010
1 + 1
0001 0011
1 + 1
0001 0100
1 + 1
0001 0101
1 + 1
0001 0110
1 + 1
0001 0111
13
0001 1000
13
0001 1001
13
0001 1010
13
0001 1011
13
0001 1100
13
0001 1101
13
0001 1110
13
0001 1111
23...........2
1
targ
T
targ
T
T
targ
T
targ
T
targ
T
targ
T
targ
T
targ
T
targ
T
targ
T
targ
T
T
T
T
T
T
T
T
T
Cycles to Execute
20
19
20
22
329+bus
26
21-22
B
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
B-7

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