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INITIALIZATION AND SYSTEM REQUIREMENTS
The register cache and the configuration word are explained further in
REGISTER CACHE" (pg.
12.3.3
Control Table
The control table is the data structure that contains the on-chip control registers values. It is
automatically loaded during initialization and must be completely constructed in the IMI.
Figure 12-7
shows the Control Table format.
For register bit definitions of the on-chip control table registers, see the following:
•
IMAP —
Section 11.7.5, "Interrupt Mapping Registers (IMAP0-IMAP2)" (pg. 11-23)
•
ICON —
Section 11.7.4, "Interrupt Control Register (ICON)" (pg. 11-22)
•
PMCON —
Section 13.5.3, "Modifying the PMCON Registers" (pg. 13-7)
•
TC —
Section 9.1.1, "Trace Controls (TC) Register" (pg. 9-2)
•
BCON —
Section 13.4.1, "Bus Control (BCON) Register" (pg. 13-6)
12-20
4-2).
section 4.2, "LOCAL
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