Intel i960 Jx Developer's Manual page 194

Microprocessor
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INSTRUCTION SET REFERENCE
movt:
if((reg_num(src1)%4 != 0) || (reg_num(dst)%4 != 0))
{
dst = undefined_value;
dst_+_1 = undefined_value;
dst_+_2 = undefined_value;
generate_fault(OPERATION.INVALID_OPERAND);
}
else if(is_reg(src1))
{
dst = src1;
dst_+_1 = src1_+_1;
dst_+_2 = src1_+_2;
}
else
{
dst[4:0] = src1;
dst[31:5] = 0;
dst_+_1[31:0] = 0;
dst_+_2[31:0] = 0;
}
movq:
if((reg_num(src1)%4 != 0) || (reg_num(dst)%4 != 0))
{
dst = undefined_value;
dst_+_1 = undefined_value;
dst_+_2 = undefined_value;
dst_+_3 = undefined_value;
generate_fault(OPERATION.INVALID_OPERAND);
}
else if(is_reg(src1))
{
dst = src1;
dst_+_1 = src1_+_1;
dst_+_2 = src1_+_2;
dst_+_3 = src1_+_3;
}
else
{
dst[4:0] = src1;
dst[31:5] = 0;
dst_+_1[31:0] = 0;
dst_+_2[31:0] = 0;
dst_+_3[31:0] = 0;
}
Faults:
STANDARD
Example:
movt g8, r4
6-82
#src1 is a 5-bit literal.
#src1 is a 5 bit literal.
Refer to
section 6.1.6, "Faults" (pg.
# r4, r5, r6
6-5).
g8, g9, g10

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