Bus Width; Physical Memory Attributes At Initialization; Figure 13-2. Pmcon Register Bit Description - Intel i960 Jx Developer's Manual

13.3.1

Bus Width

The bus width for a region is controlled by the BW1:0 bits in the PMCON register. The operation
of the i960 Jx processor with different bus width programming options is described in
section 14.2.3.1, "Bus Width" (pg.
The bit combination "11" is reserved for the BW1:0 field and can result in unpredictable operation.
28 24
31
Reserved,
write to zero
Mnemonic Name
BW1-0 Bus Width
RESERVED

Figure 13-2. PMCON Register Bit Description

13.4

Physical Memory Attributes at Initialization

All eight PMCON registers are loaded automatically during system initialization. The initial values
are stored in the Control Table in the Initialization Boot Record (see
Memory Image (IMI)" (pg.
14-7).
20 16
B B
W W
1 0
Bit #
Selects the bus width for a region:
00 = 8-bit,
23-22 01 = 16-bit,
10 = 32-bit bus
11 = reserved (do not use)
- Program to 0
12-10)).
MEMORY CONFIGURATION
12 8 4
Bus Width
00 = 8-bit
01 = 16-bit
10 = 32-bit bus
11 = reserved (do not use)
Function
section 12.3.1, "Initial
0
13
13-5