Intel NetStructure ZT 5504 Manuals

Manuals and User Guides for Intel NetStructure ZT 5504. We have 1 Intel NetStructure ZT 5504 manual available for free PDF download: Manual

Intel NetStructure ZT 5504 Manual

Intel NetStructure ZT 5504 Manual (84 pages)

System Master Processor Board

Brand: Intel | Category: Computer Hardware | Size: 0 MB

Table of Contents

Table of Contents
4
Tables
9
Figures
10
Manual Organization
11
1 Introduction

12
- Product Definition
  12
- Features
  13
- ZT 5504 Faceplate
  13
- Functional Blocks
  15
  - Compactpci/Psb Architecture
    15
  - Functional Block Diagram
    15
  - Processor
    16
  - Chipset
    16
  - PCI-To-PCI Bridge (P2P)
    16
  - Memory and I/O Addressing
    17
  - Drone Mode
    17
  - Power Ramp Circuitry
    17
  - Rear-Panel I/O
    18
  - PCI Video
    18
  - Fault Current Limits
    18
  - PCI Mezzanine Card (PMC) Interface
    19
  - Dual Ethernet Interfaces
    19
  - IDE Hard Drive
    19
  - Serial I/O
    19
  - Interrupts
    20
  - Counter/Timers
    20
  - Dma
    21
  - Real-Time Clock
    21
  - Reset
    21
  - Two-Stage Watchdog Timer
    21
  - Universal Serial Bus (USB)
    21
  - Baseboard Management Controller
    22
  - IDE Controller
    22
  - Floppy Disk Controller
    22
  - Keyboard and Mouse Controller
    22
  - LED Indicators
    22
- Software
  23
2 Getting Started

24
- Unpacking
  24
- System Requirements
  24
  - BIOS Version
    24
  - Connectivity
    24
  - Electrical and Environmental
    25
- Memory Configuration
  26
- Memory Address Map Example
  27
- I/O Address Map
  28
- I/O Configuration
  29
- Connectors
  29
- Switches and Cuttable Traces
  29
- BIOS Configuration Overview
  29
- Setup Screen
  29
- Operating System Installation
  30
3 Configuration

32
4 Reset

40
- Reset Types and Sources
  40
  - Hard Reset Sources
    40
  - Soft Reset Sources
    40
  - Backend Power down Sources
    41
  - NMI Sources
    41
5 System Monitoring and Control

42
- Monitoring and Control Functions
  42
- Smbus Address Map
  43
6 IDE Controller

45
- Features of the IDE Controller
  45
- Disk Drive Support
  45
  - Primary IDE Channel
    45
  - Secondary IDE Channel
    45
- I/O Mapping
  46
- Compactflash Carrier
  46
- Device Drivers
  46
7 Watchdog Timer

47
- Watchdog Timer Overview
  47
  - Watchdog Timer Architecture
    47
  - Power up Initialization
    48
  - Timeout Values
    48
- Using the Watchdog in an Application
  48
  - Watchdog Reset
    48
    
    Enabling the Watchdog Reset
    48
    
    Setting the Terminal Count
    49
    
    Strobing the Watchdog
    49
  - Watchdog NMI
    49
    
    Chaining the Isrs
    50
    
    Enabling the Watchdog NMI
    50
    
    NMI Handler
    51
8 BIOS Recovery

52
- Flash
  52
- BIOS Recovery Socket Location
  52
- BIOS Recovery Module
  53
  - Flash Utility Program
    53
- Specifications
  54
- Thermal Considerations
  68
  - Thermal Requirements
    68
  - Temperature Monitoring
    69
- System Registers
  70
  - System Register Definitions
    70
    
    Flash Control (78H)
    71
    
    Watchdog (79H)
    72
    
    J1 IPMB Control (7Bh)
    75
    
    Port 80 BIOS POST Codes (80H)
    75
    
    Event Monitors (E1H)
    76
    
    Switch Monitors (E3H)
    76
    
    Geographic Addressing (E4H)
    77
    
    Control Bits (E5H)
    78
    
    J5 Smbus Enable (E6H)
    78
- Datasheet Reference
  79
  - Board Serial Number
    79
  - Compactpci
    79
  - Ethernet
    79
  - Intel 440GX Agpset
    79
  - Mobile Pentium III Processor - M in BGA2 Package
    80
  - PCI-To-PCI Bridge
    80
  - PMC Specification
    80
  - Superi/O
    80
  - Video
    80
- Agency Approvals
  81

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