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This appendix describes the aspects of the microprocessor that are implementation-dependent. The
following information is intended as a guide for writing application code that is directly portable to
®
other i960
architecture implementations.
A.1
CORE ARCHITECTURE
All i960 microprocessor family products are based on the core architecture definition. An i960
processor can be thought of as consisting of two parts: the core architecture implementation and
implementation-specific features. The core architecture defines the following mechanisms and
structure:
•
Programming environment: global and local registers, literals, processor state registers,
data types, memory addressing modes, etc.
•
Implementation-independent instruction set.
•
Procedure call mechanism.
•
Mechanism for servicing interrupts and the interrupt and process priority structure.
•
Mechanism for handling faults and the implementation-independent fault types and
subtypes.
Implementation-specific features are one or all of:
•
Additions to the instruction set beyond the instructions defined by the core architecture.
•
Extensions to the register set beyond the global, local and processor-state registers that
are defined by the core architecture.
•
On-chip program or data memory.
•
Integrated peripherals that implement features not defined explicitly by the core archi-
tecture.
Code is directly portable (object-code compatible) when it does not depend on
implementation-specific instructions, mechanisms or registers. The aspects of this microprocessor
that are implementation dependent are described below. Those aspects not described below are
part of the core architecture.
APPENDIX A
CONSIDERATIONS FOR
WRITING PORTABLE CODE
A
A-1
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