Figure 9-2. Breakpoint Control Register (Bpcon); Table 9-2. Configuring The Data Address Breakpoint (Dab) Registers; Table 9-3. Programming The Data Address Breakpoint (Dab) Modes - Intel i960 Jx Developer's Manual

Microprocessor
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TRACING AND DEBUGGING
DAB0
DAB1
m
1
28
24
31
Reserved
(Initialize to 0)

Figure 9-2. Breakpoint Control Register (BPCON)

Programming the BPCON register is summarized in

Table 9-2. Configuring the Data Address Breakpoint (DAB) Registers

PC.te
DABx.e1 DABx.e0
0
X
X
X
0
0
1
0
1
1
1
0
1
1
1
NOTE: "X" = don't care. Reserved combinations must not be used.
The mode bits of BPCON control what type of access generates a fault, trace message, or break
event, as summarized in
Table

Table 9-3. Programming the Data Address Breakpoint (DAB) Modes

DABx.m1
DABx.m0
0
0
0
1
1
0
1
1
9-8
m
e
e
m
m
e
e
0
1
0
1
0
1 0
20
16
12
Table 9-2
No action. With PC.te clear, breakpoints are globally disabled.
No action. DABx is disabled.
Reserved.
Reserved.
Generate a Trace Fault.
9-3.
Break on Data Write Access Only.
Break on Data Read or Data Write Access.
Break on Data Read Access.
Reserved.
8
4
Hardware Reset Value: 0000 0000H
Software Re-Init Value: 0000 0000H
and
Table
9-3.
Description
Mode
0

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