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INSTRUCTION SET REFERENCE
6.2.2
addc
Mnemonic:
addc
Format:
addc
Description:
Adds src2 and src1 values and condition code bit 1 (used here as a carry-in)
and stores the result in dst. When ordinal addition results in a carry out,
condition code bit 1 is set; otherwise, bit 1 is cleared. When integer addition
results in an overflow, condition code bit 0 is set; otherwise, bit 0 is cleared.
Regardless of addition results, condition code bit 2 is always set to 0.
can be used for ordinal or integer arithmetic.
addc
between ordinal and integer source operands. Instead, the processor evaluates
the result for both data types and sets condition code bits 0 and 1 accordingly.
An integer overflow fault is never signaled with this instruction.
dst = (src1 + src2 + AC.cc[1])[31:0];
Action:
AC.cc[2:0] = 000
if((src2[31] == src1[31]) && (src2[31] != dst[31]))
AC.cc[0] = 1;
AC.cc[1] = (src2 + src1 + AC.cc[1])[32];
STANDARD
Faults:
Example:
# Example of double-precision arithmetic.
# Assume 64-bit source operands
# in g0,g1 and g2,g3
cmpo 1, 0
addc g0, g2, g0
addc g1, g3, g1
Opcode:
addc
See Also:
ADD<cc>, SUB<cc>, subc, addi, addo
Sets the condition code in the arithmetic controls.
Side Effects:
6-10
Add Ordinal With Carry
src1,
src2,
reg/lit
reg/lit
;
2
Refer to
# Clears Bit 1 (carry bit) of
# the AC.cc.
# Add low-order 32 bits:
# g0
g2 + g0 + carry bit
# Add high-order 32 bits:
# g1
g3 + g1 + carry bit
# 64-bit result is in g0, g1.
5B0H
REG
dst
reg
does not distinguish
addc
# Set overflow bit.
# Carry out.
section 6.1.6, "Faults" (pg.
6-5).
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