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Address Space
An array of bytes used to store program code, data, stacks and system
data structures required to execute a program. Address space is linear –
also called flat – and byte addressable, with addresses running contigu-
ously from 0 to 2
memory and memory-mapped I/O. i960
dedicated, addressable I/O space.
Address
A 32-bit value in the range 0 to FFFF FFFFH used to reference in
memory a single byte, half-word (2 bytes), word (4 bytes), double-word
(8 bytes), triple-word (12 bytes) or quad-word (16 bytes). Choice depends
on the instruction used.
Arithmetic
A 32-bit register that contains flags and masks used in controlling the
Controls (AC)
various arithmetic and comparison operations that the processor
Register
performs. Flags and masks contained in this register include the condition
code flags, integer-overflow flag and mask bit and the no-imprecise-faults
(NIF) bit. All unused bits in this register are reserved and must be set to 0.
Asynchronous
Faults that occur with no direct relationship to a particular instruction in the
Faults
instruction stream. When an asynchronous fault occurs, the address of the
faulting instruction in the fault record and the saved IP are undefined. i960
core architecture does not define any fault types that are asynchronous.
Big Endian
The bus controller reads or writes a data word's least-significant byte to
the bus' eight most-significant data lines (D31:24). Big endian systems
store the least-significant byte at the highest byte address in memory. So,
if a big endian ordered word is stored at address 600, the least-significant
byte is stored at address 603 and the most-significant byte at address 600.
Compare with little endian.
Condition Code
AC register bits 0, 1 and 2. The condition code flags indicate the results of
Flags
certain instructions – usually compare instructions. Other instructions,
such as conditional branch instructions, examine these flags and perform
functions according to their state. Once the processor sets the condition
code flags, they remain unchanged until the processor executes another
instruction that uses these flags to store results.
Execution Mode
PC register bit 1. This flag determines whether the processor is operating
Flag
in user mode (0) or supervisor mode (1).
Fault Call
An implicit call to a fault handling procedure. The processor performs
fault calls automatically without any intervention from software. It gets
pointers to fault handling procedures from the fault table.
32
- 1. It can be mapped to read-write memory, read-only
®
architecture does not define a
GLOSSARY
Glossary-1
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