Byte Ordering And Bus Accesses; Table 14-9. Byte Ordering On Bus Transfers, Word Data Type - Intel i960 Jx Developer's Manual

Microprocessor
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EXTERNAL BUS
14.2.6

Byte Ordering and Bus Accesses

The default byte-order for both instruction and data accesses is programmed in the DLMCON
register to be either little- or big-endian. On the i960 Jx processor, DLMCON.be controls the
default byte order for internal (on-chip data ram and data cache) accesses as well as external
accesses. The programming of DLMCON is discussed in
Order" (pg.
13-12).
The processor handles the byte data type the same regardless of byte ordering.
byte data 0xDD being transferred on 8, 16 and 32 bit buses.
For the short word data type, assume that a hexadecimal value of 0xCCDD is stored in one of the
processor's internal registers.
either a little endian or big endian memory region. Note that the short word goes out on different
data lines on a 32-bit bus depending upon whether address line A1 is odd or even. In this example,
the transfer is assumed to be aligned.
For the word data type, assume that a hexadecimal value of 0xAABBCCDD is stored in an
internal processor register, where 0xAA is the word's most significant byte and 0xDD is the least
significant byte.
Table 14-9
either little endian or big endian memory.
The i960 Jx processor supports multi-word big endian data types with individual word accesses.
Bytes in each word are stored in big-endian order; however, words are stored in little-endian order.
Consider
Figure
14-16, which illustrates a double word store to big endian memory.

Table 14-9. Byte Ordering on Bus Transfers, Word Data Type

Word Data Type
Addr
Bus
Bits
Xfer
Width
A1, A0
32 bit
00
1st
00
1st
16 bit
10
2nd
00
1st
01
2nd
8 bit
10
3rd
11
4th
14-28
Table 14-10
shows how this short word is transferred on the bus to
shows how this word is transferred on the bus to an aligned address in
Bus Pins (AD31:0)
Little Endian
31:24
23:16
15:8
AA
BB
CC
--
--
CC
--
--
AA
--
--
--
--
--
--
--
--
--
--
--
--
section 13.6.2, "Selecting the Byte
Table 14-11
Big Endian
7:0
31:24
23:16
15:8
DD
DD
CC
BB
DD
--
--
BB
BB
--
--
DD
DD
--
--
--
CC
--
--
--
BB
--
--
--
AA
--
--
--
shows
7:0
AA
AA
CC
AA
BB
CC
DD

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