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11.6.5.2
Posting Software Interrupts Directly in the Interrupt Table
Software can post interrupts by setting the desired pending-interrupt and pending-priorities bits
directly. Direct posting requires that software ensure that no external I/O agents post a pending
interrupt simultaneously, and that an interrupt cannot occur after one bit is set but before the other
is set. Note, however, that this method is not recommended and is not reliable.
11.6.5.3
Posting External Interrupts
An external agent posts (sets) a pending interrupt with vector "v" to the i960 processor through the
interrupt table by executing the following algorithm:
External_Agent_Posting:
x = atomic_read(pending_priorities); # synchronize;
z = read(pending_interrupts[v/8]);
x[v/8] = 1;
z[v mod 8] = 1;
write(pending_interrupts[v/8]) = z;
atomic_write(pending_priorities) = x;
Generally, software cannot use this algorithm to post interrupts because there is no way for
software to have an atomic (locking) read/write operation span multiple instructions.
11.6.5.4
Posting Hardware Interrupts
Certain interrupts are posted directly to the processor by an implementation-dependent mechanism
that can bypass the interrupt table. This is often done for performance reasons.
11.6.6
Resolving Interrupt Priority
The interrupt controller continuously compares the processor's priority to the priorities of the
highest-posted software interrupt and the highest-pending hardware interrupt. The core is
interrupted when a pending interrupt request is higher than the processor priority or has a priority
of 31. (Note that a priority-31 interrupt handler can be interrupted by another priority-31 interrupt.)
There are no priority-0 interrupts, since such an interrupt would never have a priority higher than
the current process, and would therefore never be serviced.
Example 11-2. External Agent Posting
INTERRUPTS
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