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PROCEDURE CALLS
7.1.2
Local Register and Stack Management
Global register g15 (FP) and local registers r0 (PFP), r1 (SP) and r2 (RIP) contain information to
link procedures together and link local registers to the procedure stack
subsections describe this linkage information.
7.1.2.1
Frame Pointer
The frame pointer is the current stack frame's first byte address. It is stored in global register g15,
the frame pointer (FP) register. The FP register is always reserved for the frame pointer; do not use
g15 for general storage.
Stack frame alignment is defined for each implementation of the i960 processor family, according
to an SALIGN parameter (see
i960 Jx processor, stacks are aligned on 16-byte boundaries (see
needs to create a new frame on a procedure call, it adds a padding area to the stack so that the new
frame starts on a 16-byte boundary.
7.1.2.2
Stack Pointer
The stack pointer is the byte-aligned address of the stack frame's next unused byte. The stack
pointer value is stored in local register r1, the stack pointer (SP) register. The procedure stack
grows upward (i.e., toward higher addresses). When a stack frame is created, the processor
automatically adds 64 to the frame pointer value and stores the result in the SP register. This action
creates the register save area in the stack frame for the local registers.
The program must modify the SP register value when data is stored or removed from the stack.
The i960 architecture does not provide an explicit push or pop instruction to perform this action.
This is typically done by adding the size of all pushes to the stack in one operation.
7.1.2.3
Considerations When Pushing Data onto the Stack
Care should be taken in writing to the stack in the presence of unforeseen faults and interrupts. In
the general case, to ensure that the data written to the stack is not corrupted by a fault or interrupt
record, the SP should be incremented first to allocate the space, and then the data should be written
to the allocated space:
mov
sp,r4
addo
24,sp,sp
st
data,(r4)
...
st
data,20(r4)
7-4
section A.3, "Data and Data Structure Alignment" (pg.
(Figure
7-1). The following
A-3)). In the
Figure
7-1). When the processor
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