Figure 6-1. Dcctl Src1 And Src/Dst Formats - Intel i960 Jx Developer's Manual

Microprocessor
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31
src/dst Format for Data Cache Status
31
28 27
# of Ways-1
src/dst Format for Store Data Cache Sets to Memory
31
Ending Set #
Reserved,
(Initialize to 0)

Figure 6-1. dcctl src1 and src/dst Formats

INSTRUCTION SET REFERENCE
src1 Format
16 15
12
11
2
log2 (# of Sets)
log2 (Atoms/Line)
log2 (Bytes/Atom)
16 15
Starting Set #
8
7
0
Function Type
8
4
3
0
7
2
Enabled = 1
Disabled = 0
0
6
6-41

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