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DATA TYPES AND MEMORY ADDRESSING MODES
At the assembly language level, the assembler allows the offset to be specified with an expression
or symbolic label, then evaluates the address to determine whether to use register-indirect-with-
offset (MEMA format) or register-indirect-with-displacement (MEMB format) addressing mode.
Register-indirect-with-index-and-displacement addressing mode adds both a scaled index and a
displacement to the address base. There is only one version of this addressing mode at the
instruction encoding level, and it is encoded in the MEMB instruction format.
2.3.3
Index with Displacement
A scaled index can also be used with a displacement alone. The index is contained in a register and
multiplied by a scaling constant before displacement is added. This mode uses MEMB format.
2.3.4
IP with Displacement
This addressing mode is used with load and store instructions to make them instruction pointer
(IP) relative. IP-with-displacement addressing mode references the next instruction's address plus
the displacement. This mode uses MEMB format.
2.3.5
Addressing Mode Examples
The following examples show how i960 processor addressing modes are encoded in assembly
language.
Example 2-2
shows addressing mode mnemonics.
usefulness of scaled index and scaled index plus displacement addressing modes. In this example,
a procedure named array_op uses these addressing modes to fill two contiguous memory blocks
separated by a constant offset. A pointer to the top of the block is passed to the procedure in g0, the
block size is passed in g1 and the fill data in g2.
For more details on encoding formats, refer to
INSTRUCTION
FORMATS.
2-8
Example 2-3
illustrates the
APPENDIX C, MACHINE-LEVEL
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