Generating A Trace Fault; Handling Multiple Trace Events; Table 9-4. Instruction Breakpoint Modes - Intel i960 Jx Developer's Manual

Microprocessor
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PC.te
IPBx.m1
0
X
X
0
1
0
1
1
1
1
NOTE: "X" = don't care. Reserved combinations must not be used.
9.3

GENERATING A TRACE FAULT

To summarize the information presented in the previous sections, the processor services a trace
fault when PC.te is set and the processor detects any of the following conditions:
An instruction included in a trace mode group executes or is about to execute (in the case of a
prereturn trace event) and the trace mode for that instruction is enabled.
A fault call operation executes and the call-trace mode is enabled.
A
instruction executes and the mark-trace mode is enabled.
mark
An
instruction executes.
fmark
The processor executes an instruction at an IP matching an enabled instruction address
breakpoint (IPB) register.
The processor issues a memory access matching the conditions of an enabled data address
breakpoint (DAB) register.
9.4

HANDLING MULTIPLE TRACE EVENTS

With the exception of a prereturn trace event, which is always reported alone, it is possible for a
combination of trace events to be reported in the same fault record. The processor may not report all
events; however, it will always report a supervisor event and it will always signal at least one event.
If the processor reports prereturn trace and other trace types at the same time, it reports the other
trace types in a single trace fault record first, and then services the prereturn trace fault upon return
from the other trace fault.

Table 9-4. Instruction Breakpoint Modes

IPBx.m0
X
No action. Globally disabled.
0
No action. IPBx disabled.
1
Reserved.
0
Reserved.
1
Generate a Trace Fault.
TRACING AND DEBUGGING
Action
9
9-11

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