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6.2.10
bbc, bbs
Mnemonic:
bbc
bbs
Format:
bb*
Description:
Checks bit (designated by bitpos) in src and sets AC register condition code
according to src value. The processor then performs conditional branch to
instruction specified with targ, based on condition code state.
For
bbc
000
and branches to instruction specified by targ; otherwise, it sets condition
2
code to 010
For
bbs
and branches to targ; otherwise, it sets condition code to 000
next instruction.
targ can be no farther than -2
the Intel i960 processor assembler, targ must be a label which specifies target
instruction's IP.
Action:
bbs:
if((src & 2**(bitpos%32)) == 1)
{
AC.cc = 010
temp[31:2] = sign_extension(targ[12:2]);
IP[31:2] = IP[31:2] + temp[31:2];
IP[1:0] = 0;
}
else
AC.cc = 000
bbc:
if((src & 2**(bitpos%32)) == 0)
{
AC.cc = 000
temp[31:2] = sign_extension(targ[12:2]);
IP[31:2] = IP[31:2] + temp[31:2];
IP[1:0] = 0;
}
else
AC.cc = 010
STANDARD
Faults:
Check Bit and Branch If Clear
Check Bit and Branch If Set
bitpos,
src,
reg/lit
reg
, when selected bit in src is clear, the processor sets condition code to
and goes to next instruction.
2
, when selected bit is set, the processor sets condition code to 010
12
to (2
;
2
;
2
;
2
;
2
Refer to
INSTRUCTION SET REFERENCE
targ
disp
12
- 4) bytes from current IP. When using
section 6.1.6, "Faults" (pg.
6
2
and goes to
2
6-5).
6-19
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