Figure 14-9. Burst Read And Write Transactions W/O Wait States, 8-Bit Bus - Intel i960 Jx Developer's Manual

EXTERNAL BUS
T
a
CLKIN
AD31:0
ADDR
ALE
ADS
A3:2
BE1/A1
00 or 10
BE0/A0
WIDTH1:0
D/C
W/R
BLAST
DT/R
DEN
RDYRCV

Figure 14-9. Burst Read and Write Transactions w/o Wait States, 8-bit Bus

14-16
T T T T T T
d d r a d
D D ADDR DATA DATA DATA
In In Out
00,01,10 or 11
00,01,10 or 11
01 or
00
11
00
00
T T T
d d d r
DATA
Out
Out Out
01 10 11
F_JF033A