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TEST FEATURES
TCK
TMS
0 0 0 1 1 0 0 0 0 0
TDI
Don't Care
IR Shift Reg
4 bits long
Parallel Out
Old Inst abcd
DR Shift Reg
( n bits long)
Register
Selected
TDO
15-16
0 0 0 0 0 0 0 0 0 0
1 1 1
1
0 0 0
a
1
0
0
0
b
a
1
0
0
c
b
a
1
0
d
c
b
a
1
NEW Inst = 0001
Don't Care
Instruction Register
Boundary Scan
P P P P P P
0 0 0 0 0 0
d c b a
0 1 2 3 4 5
Figure 15-3. JTAG Example
0
0 0 0
0 0 0 0
1
0
Don't Care
2
P P P P P
P
n n n n n
n
-6 -5 -4 -3 -2
-1
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